DS2408 Maxim, DS2408 Datasheet - Page 16

• Manufacturer Part Number: DS2408
• Description: The DS2408 is an 8-channel, programmable I/O 1-Wire® chip
• Manufacturer: Maxim

CONTROL FUNCTION COMMANDS
Once a ROM function command is completed, the Control Function Commands can be issued. The
Control Functions Flow Chart (Figure 8) describes the protocols necessary for accessing the PIO
channels and the special function registers of the DS2408. The communication between the master and
the DS2408 takes place either at standard speed (default, OD = 0) or at overdrive speed (OD = 1). If not
explicitly set into the overdrive mode, the device operates at standard speed.
Read PIO Registers [F0h]
The Read PIO Registers command is used to read any of the device's registers. After issuing the
command, the master must provide the 2-byte target address. After these two bytes, the master reads data
beginning from the target address and may continue until address 008Fh. If the master continues reading,
it will receive an inverted 16-bit CRC of the command, address bytes, and all data bytes read from the
initial starting byte through the end of the register page. This CRC16 is the result of clearing the CRC
generator and then shifting in the command byte followed by the two address bytes and the data bytes
beginning at the first addressed location and continuing through to the last byte of the register page. After
the bus master has received the CRC16, the DS2408 responds to any subsequent read-time slots with
logical 1’s until a 1-Wire Reset command is issued. If this command is issued with target address 0088h
(PIO Logic State Register), the PIO sampling takes place during the transmission of the MS bit of TA2. If
the target address is lower than 0088h, the sampling takes place while the master reads the MS bit from
address 0087h.
Channel-Access Read [F5h]
In contrast to reading the PIO logical state from address 88h, this command reads the status in an endless
loop. After 32 bytes of PIO pin status the DS2408 inserts an inverted CRC16 into the data stream, which
allows the master to verify whether the data was received error-free. A Channel-Access Read can be
terminated at any time with a 1-Wire Reset.
Figure 9. CHANNEL-ACCESS READ TIMING
Notes:
1) The "previous byte" could be the command code, the data byte resulting from the previous PIO
2) The sample point timing also applies to the Channel-access Write command, with the "previous byte"
sample, or the MS byte of a CRC16. The example shows a read-1 time slot.
being the write confirmation byte (AAh). No
Channel-Access Write command.
IO (1-Wire)
STRB\
Example - Sampled State = 72h
MS 2 bits of pre-
vious byte (8Dh)
Sampling Point
STRB
16 of 39
t
SPD
pulse results when sampling occurs during a
t
SPD
LS 2 bits of data
byte (72h)
t
SPD
DS2408