STV2050A STMicroelectronics, STV2050A Datasheet - Page 15

• Manufacturer Part Number: STV2050A
• Description: IC DGTL CONVERGENCE PROC 80-PQFP
• Manufacturer: STMicroelectronics
• Type: Videor

Specifications of STV2050A

• Applications: HDTV
• Mounting Type: Surface Mount
• Package / Case: 80-MQFP, 80-PQFP
• Case: QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3 SLAVE I²C BUS INTERFACE
3.1 FEATURES
The I²C interface is controlled by 4 pins:
3.1.1 ADS0: IC Address and PLL Mode
The level at this pin corresponds to bit 1 in the first byte in bus transmissions.
– If ADS0 is connected to GND, the analog outputs will be automatically switched on after the
– If the pin is connected to VCC, the DACs will remain in high impedance. The internal PLL is
3.1.2 SCLS Bus Clock
The polarity and timing for this pin comply with I²C Bus specifications.
3.1.3 SDAI Bus Data Input
The polarity and timing for this pin comply with I²C Bus specifications.
3.1.4 SDAO Bus Data Output
The polarity reversal and timing for this pin comply with I²C Bus specifications.
Abbreviations used:
The slave accepts the following DA subaddresses depending on the hardware configuration
defined on pin ADS0.
For the 00 to CF address range (RAM), an autoincrement function can be enabled using the
AIE (Auto Increment Enable) bit in the E7 register.
reset sequence, and once the internal PLL is activated.
inhibited, and the IC must use an external PLL.
S
P
DA
DR
DW
SA
D0, D1,... Dn
ADS0
AIE
Start condition
Stop condition
Device address
Device address for read
Device address for write
Sub-address
Data bytes
0 (grounded, internal PLL only) DR = 39, DW = 38
1 (3.3 Volt, external PLL only) DR = 3B, DW = 3A
0 = Autoincrement disabled
1 = Autoincrement enabled
STV2050A - SLAVE I²C BUS INTERFACE
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