74AHCT244PW,112 NXP Semiconductors, 74AHCT244PW,112 Datasheet

IC BUFF/DVR TRI-ST DUAL 20TSSOP

74AHCT244PW,112

Manufacturer Part Number
74AHCT244PW,112
Description
IC BUFF/DVR TRI-ST DUAL 20TSSOP
Manufacturer
NXP Semiconductors
Series
74AHCTr
Datasheet

Specifications of 74AHCT244PW,112

Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
2
Number Of Bits Per Element
4
Current - Output High, Low
8mA, 8mA
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74AHCT244PW
74AHCT244PW
935261959112
1. General description
2. Features
3. Ordering information
Table 1.
Type number
74AHC244D
74AHCT244D
74AHC244PW
74AHCT244PW
74AHC244BQ
74AHCT244BQ
Ordering information
Package
Temperature range
40 C to +125 C
40 C to +125 C
40 C to +125 C
The 74AHC244; 74AHCT244 is a high-speed Si-gate CMOS device.
The 74AHC244; 74AHCT244 has octal non-inverting buffer/line drivers with 3-state
outputs. The 3-state outputs are controlled by the output enable inputs (nOE). A HIGH on
nOE causes the outputs to assume a high-impedance OFF-state.
74AHC244; 74AHCT244
Octal buffer/line driver; 3-state
Rev. 05 — 20 December 2007
Balanced propagation delays
All inputs have a Schmitt-trigger action
Inputs accepts voltages higher than V
For 74AHC244 only: operates with CMOS input levels
For 74AHCT244 only: operates with TTL input levels
ESD protection:
Multiple package options
Specified from 40 C to +85 C and from 40 C to +125 C
HBM JESD22-A114E exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101C exceeds 1000 V
Name
SO20
TSSOP20
DHVQFN20
Description
plastic small outline package; 20 leads;
body width 7.5 mm
plastic thin shrink small outline package; 20 leads;
body width 4.4 mm
plastic dual-in-line compatible thermal enhanced
very thin quad flat package; no leads; 20 terminals;
body 2.5
CC
4.5
0.85 mm
Product data sheet
Version
SOT163-1
SOT360-1
SOT764-1

Related parts for 74AHCT244PW,112

74AHCT244PW,112 Summary of contents

Page 1

Octal buffer/line driver; 3-state Rev. 05 — 20 December 2007 1. General description The 74AHC244; 74AHCT244 is a high-speed Si-gate CMOS device. The 74AHC244; 74AHCT244 has octal non-inverting buffer/line drivers with 3-state outputs. The 3-state outputs are controlled ...

Page 2

... NXP Semiconductors 4. Functional diagram Fig 1. Functional diagram 2 18 1A0 1Y0 2A0 4 16 1A1 2A1 1Y1 6 14 1A2 2A2 1Y2 8 12 1A3 1Y3 2A3 1 1OE 2OE Fig 2. Logic symbol 74AHC_AHCT244_5 Product data sheet 74AHC244; 74AHCT244 1A0 1Y0 2 1A1 1Y1 4 1A2 1Y2 6 1A3 ...

Page 3

... NXP Semiconductors 5. Pinning information 5.1 Pinning 74AHC244 74AHCT244 1 1OE 1A0 2 2Y0 3 1A1 4 5 2Y1 1A2 6 2Y2 7 8 1A3 2Y3 9 GND 10 Fig 4. Pin configuration SO20, TSSOP20 5.2 Pin description Table 2. Pin description Symbol Pin Description 1OE 1 output enable input (active LOW) ...

Page 4

... NXP Semiconductors 6. Functional description [1] Table 3. Function table Control nOE HIGH voltage level LOW voltage level don’t care high-impedance OFF-state. 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). ...

Page 5

... NXP Semiconductors 8. Recommended operating conditions Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC V input voltage I V output voltage O T ambient temperature amb t/ V input transition rise and fall rate 9. Static characteristics Table 6. Static characteristics Voltages are referenced to GND (ground = 0 V) ...

Page 6

... NXP Semiconductors Table 6. Static characteristics Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions C input I capacitance C output O capacitance For type 74AHCT244 V HIGH-level input voltage V LOW-level input voltage V HIGH-level output voltage 8 LOW-level output voltage 8 OFF-state per input pin output current V = 5.5 V ...

Page 7

... NXP Semiconductors 10. Dynamic characteristics Table 7. Dynamic characteristics GND = 0 V. For test circuit see Figure Symbol Parameter Conditions For type 74AHC244 t propagation nAn to nYn; see pd delay enable time nOE to nYn; see disable time nOE to nYn; see dis 3.6 V ...

Page 8

... NXP Semiconductors Table 7. Dynamic characteristics GND = 0 V. For test circuit see Figure Symbol Parameter Conditions For type 74AHCT244 t propagation nAn to nYn; see pd delay enable time nOE to nYn; see 4 5 disable time nOE to nYn; see dis power per buffer; PD dissipation ...

Page 9

... NXP Semiconductors nOE input nYn output LOW-to-OFF OFF-to-LOW nYn output HIGH-to-OFF OFF-to-HIGH Measurement points are given in V and V are typical voltage output levels that occur with the output load Fig 7. enable and disable times Table 8. Measurement points Type 74AHC244 74AHCT244 74AHC_AHCT244_5 Product data sheet 74AHC244 ...

Page 10

... NXP Semiconductors PULSE GENERATOR Test data is given in Table 9. Definitions test circuit Termination resistance should be equal to output impedance Load capacitance including jig and probe capacitance Load resistor Test selection switch Fig 8. Load circuitry for switching times Table 9. Test data Type Input ...

Page 11

... NXP Semiconductors 12. Package outline SO20: plastic small outline package; 20 leads; body width 7 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.3 2.45 2.65 mm 0.25 0.1 2.25 0.012 0.096 0.1 inches 0.01 0.004 0.089 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...

Page 12

... NXP Semiconductors TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...

Page 13

... NXP Semiconductors DHVQFN20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 20 terminals; body 2.5 x 4.5 x 0.85 mm terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0. 0.2 0.00 0.18 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...

Page 14

... Product data sheet Data sheet status Product data sheet The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. Legal texts have been adapted to the new company name where appropriate. Section 3: DHVQFN20 package added. Section 7: derating values added for DHVQFN20 package ...

Page 15

... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

Page 16

... NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Functional description . . . . . . . . . . . . . . . . . . . 4 7 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11 13 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 14 14 Revision history ...

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