74AHCT245D,112 NXP Semiconductors, 74AHCT245D,112 Datasheet

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74AHCT245D,112

Manufacturer Part Number
74AHCT245D,112
Description
IC TRANSCVR TRI-ST 8BIT 20SOIC
Manufacturer
NXP Semiconductors
Series
74AHCTr
Datasheet

Specifications of 74AHCT245D,112

Logic Type
Transceiver, Non-Inverting
Number Of Elements
1
Number Of Bits Per Element
8
Current - Output High, Low
8mA, 8mA
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
20-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74AHCT245D
74AHCT245D
935261960112
1. General description
2. Features
The 74AHC245; 74AHCT245 is a high-speed Si-gate CMOS device.
The 74AHC245; 74AHCT245 is an octal transceiver featuring non-inverting 3-state bus
compatible outputs in both send and receive directions.
The 74AHC245; 74AHCT245 features an output enable input (OE), for easy cascading,
and a send and receive direction control input (DIR).
OE controls the outputs so that the buses are effectively isolated.
I
I
I
I
I
I
I
74AHC245; 74AHCT245
Octal bus transceiver; 3-state
Rev. 04 — 25 April 2008
Balanced propagation delays
All inputs have Schmitt-trigger actions
Inputs accept voltages higher than V
Input levels:
ESD protection:
Multiple package options
Specified from 40 C to +85 C and from 40 C to +125 C
N
N
N
N
N
For 74AHC245: CMOS level
For 74AHCT245: TTL level
HBM EIA/JESD22-A114E exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V
CDM EIA/JESD22-C101C exceeds 1000 V
CC
Product data sheet

Related parts for 74AHCT245D,112

74AHCT245D,112 Summary of contents

Page 1

Octal bus transceiver; 3-state Rev. 04 — 25 April 2008 1. General description The 74AHC245; 74AHCT245 is a high-speed Si-gate CMOS device. The 74AHC245; 74AHCT245 is an octal transceiver featuring non-inverting 3-state bus compatible outputs in both send ...

Page 2

... NXP Semiconductors 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name 74AHC245 74AHC245D +125 C 74AHC245PW +125 C 74AHCT245 74AHCT245D +125 C 74AHCT245PW +125 C 4. Functional diagram DIR Fig 1. Logic symbol 74AHC_AHCT245_4 Product data sheet 74AHC245; 74AHCT245 Description SO20 plastic small outline package; 20 leads; ...

Page 3

... NXP Semiconductors 5. Pinning information 5.1 Pinning Fig 3. Pin configuration SO20 and TSSOP20 5.2 Pin description Table 2. Pin description Symbol Pin DIR GND 74AHC_AHCT245_4 Product data sheet 74AHC245; 74AHCT245 1 DIR 245 GND 10 001aac431 Description direction control input data input/output data input/output ...

Page 4

... NXP Semiconductors 6. Functional description [1] Table 3. Function table Control OE DIR [ HIGH voltage level LOW voltage level don’t care high-impedance OFF-state. 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol ...

Page 5

... NXP Semiconductors 8. Recommended operating conditions Table 5. Operating conditions Symbol Parameter 74AHC245 V supply voltage CC V input voltage I V output voltage O T ambient temperature amb t/ V input transition rise and fall rate 74AHCT245 V supply voltage CC V input voltage I V output voltage O T ambient temperature ...

Page 6

... NXP Semiconductors Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions I input leakage GND current 5 OFF-state output current 5 supply current 5 input capacitance C output O capacitance 74AHCT245 V HIGH-level input voltage V LOW-level input voltage V HIGH-level ...

Page 7

... NXP Semiconductors 10. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions 74AHC245 t propagation An; pd delay see Figure enable time Bn; en signal name DIR; see Figure disable time Bn; ...

Page 8

... NXP Semiconductors Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions t disable time Bn; dis signal name DIR; see Figure power MHz dissipation V = GND capacitance [1] Typical values are measured at nominal supply voltage (V [2] ...

Page 9

... NXP Semiconductors OE input output LOW-to-OFF OFF-to-LOW output HIGH-to-OFF OFF-to-HIGH Measurement points are given in V and V are typical voltage output levels that occur with the output load Fig 5. Enable and disable times Table 8. Measurement points Type Input V M 74AHC245 0.5 74AHCT245 1.5 V ...

Page 10

... NXP Semiconductors negative positive Test data is given in Table Definitions test circuit Termination resistance should be equal to output impedance Load capacitance including jig and probe capacitance Load resistance Test selection switch. Fig 6. Load circuitry for measuring switching times Table 9. Test data Type Input ...

Page 11

... NXP Semiconductors 11. Package outline SO20: plastic small outline package; 20 leads; body width 7 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.3 2.45 2.65 mm 0.25 0.1 2.25 0.012 0.096 0.1 inches 0.01 0.004 0.089 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...

Page 12

... NXP Semiconductors TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...

Page 13

... Document ID Release date 74AHC_AHCT245_4 20080425 • Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Table 74AHC_AHCT245_N_3 20070925 74AHC_AHCT245_2 ...

Page 14

... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

Page 15

... NXP Semiconductors 16. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Functional description . . . . . . . . . . . . . . . . . . . 4 7 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 10.1 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 11 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11 12 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 13 13 Revision history ...

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