74AUP2G126DC,125 NXP Semiconductors, 74AUP2G126DC,125 Datasheet - Page 11

• Manufacturer Part Number: 74AUP2G126DC,125
• Description: IC BUFF DVR 3-ST DL L PWR 8VSSOP
• Manufacturer: NXP Semiconductors
• Series: 74AUPr

Specifications of 74AUP2G126DC,125

• Logic Type: Buffer/Line Driver, Non-Inverting
• Number Of Elements: 2
• Number Of Bits Per Element: 1
• Current - Output High, Low: 4mA, 4mA
• Voltage - Supply: 0.8 V ~ 3.6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: US8, 8-VSSOP
• Logic Family: AUP
• Number Of Channels Per Chip: 2
• Polarity: Non-Inverting
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 0.8 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• High Level Output Current: - 4 mA
• Low Level Output Current: 4 mA
• Minimum Operating Temperature: - 40 C
• Number Of Lines (input / Output): 2 / 2
• Output Type: 3-State
• Propagation Delay Time: 18.7 ns at 1.1 V to 1.3 V, 10.8 ns at 1.4 V to 1.6 V, 8.4 ns at 1.65 V to 1.95 V, 6.3 ns at 2.3 V to 2.7 V, 5.8 ns at 3 V to 3.6 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-4987-2; 74AUP2G126DC,125; 74AUP2G126DC-G; 74AUP2G126DC-G; 935280729125

NXP Semiconductors
Table 8.
Voltages are referenced to GND (ground = 0 V); for test circuit see
[1]
[2]
[3]
[4]
[5]
12. Waveforms
Table 9.
74AUP2G126
Product data sheet
Symbol Parameter
C
C
Supply voltage
V
0.8 V to 3.6 V
Fig 7.
L
PD
CC
= 5 pF, 10 pF, 15 pF and 30 pF
All typical values are measured at nominal V
t
t
t
C
P
f
f
C
V
N = number of inputs switching;
Σ(C
pd
en
dis
i
o
PD
D
= input frequency in MHz;
L
CC
= output frequency in MHz;
is the same as t
is the same as t
= output load capacitance in pF;
is the same as t
= C
L
is used to determine the dynamic power dissipation (P
= supply voltage in V;
× V
Measurement points are given in
Logic levels: V
The data input (nA) to output (nY) propagation delays
power dissipation
capacitance
PD
Dynamic characteristics
Measurement points
CC
× V
2
× f
CC
o
2
) = sum of the outputs.
× f
PLH
PZH
PHZ
i
× N + Σ(C
OL
and t
and t
and t
and V
PHL
PZL
PLZ
Output
V
0.5 × V
Conditions
output enabled; f
V
OH
L
M
.
.
I
.
V
V
V
V
V
V
× V
= GND to V
are typical output voltage levels that occur with the output load.
CC
CC
CC
CC
CC
CC
CC
nY output
CC
nA input
= 0.8 V
= 1.1 V to 1.3 V
= 1.4 V to 1.6 V
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 3.0 V to 3.6 V
2
…continued
× f
Table
o
All information provided in this document is subject to legal disclaimers.
) where:
CC
CC
9.
GND
V
V
.
OH
OL
i
V
= 1 MHz;
I
Rev. 06 — 21 June 2010
Input
V
0.5 × V
M
D
V
in μW).
M
V
CC
M
[5]
t
PHL
Figure
Min
-
-
-
-
-
-
9.
Typ
25 °C
Low-power dual buffer/line driver; 3-state
2.7
2.8
2.9
3.0
3.6
4.2
V
V
[1]
I
CC
mna230
t
Max
PLH
-
-
-
-
-
-
Min
-
-
-
-
-
-
74AUP2G126
−40 °C to +125 °C
(85 °C)
Max
-
-
-
-
-
-
t
≤ 3.0 ns
r
= t
© NXP B.V. 2010. All rights reserved.
f
(125 °C)
Max
-
-
-
-
-
-
11 of 24
Unit
pF
pF
pF
pF
pF
pF