74LVC2G125DC,125 NXP Semiconductors, 74LVC2G125DC,125 Datasheet - Page 4
![IC BUS BUFF DVR TRI-ST DL 8VSSOP](/photos/6/94/69485/8-vssop_sot765-1_sml.jpg)
74LVC2G125DC,125
Manufacturer Part Number
74LVC2G125DC,125
Description
IC BUS BUFF DVR TRI-ST DL 8VSSOP
Manufacturer
NXP Semiconductors
Series
74LVCr
Datasheet
1.74LVC2G125DC125.pdf
(22 pages)
Specifications of 74LVC2G125DC,125
Package / Case
US8, 8-VSSOP
Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
2
Number Of Bits Per Element
1
Current - Output High, Low
32mA, 32mA
Voltage - Supply
2 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
LVC
Number Of Channels Per Chip
2
Polarity
Non-Inverting
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.65 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
High Level Output Current
- 32 mA
Input Bias Current (max)
40 uA
Low Level Output Current
32 mA
Minimum Operating Temperature
- 40 C
Output Type
3-State
Propagation Delay Time
2.7 ns (Typ) @ 2.7 V or 2.3 ns (Typ) @ 3 V to 3.6 V or 1.9 ns (Typ) @ 4.5 V to 5.5 V
Number Of Lines (input / Output)
2 / 2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74LVC2G125DC-G
74LVC2G125DC-G
935274507125
74LVC2G125DC-G
935274507125
NXP Semiconductors
Table 3.
7. Functional description
Table 4.
[1]
74LVC2G125
Product data sheet
Symbol
1OE, 2OE
1A, 2A
GND
1Y, 2Y
V
Control
nOE
L
L
H
Fig 5.
CC
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
Pin configuration SOT996-2
GND
1OE
Pin description
Function table
1A
2Y
Pin
SOT505-2, SOT765-1, SOT833-1, SOT1089,
SOT996-2, SOT1116 and SOT1203
1, 7
4
6, 3
8
2, 5
1
2
3
4
6.2 Pin description
Transparent top view
74LVC2G125
[1]
001aai243
Input
nA
L
H
X
All information provided in this document is subject to legal disclaimers.
8
7
6
5
V
2OE
1Y
2A
CC
Rev. 11 — 9 September 2010
SOT902-1
7, 1
6, 3
4
2, 5
8
Fig 6.
Pin configuration SOT902-1
terminal 1
index area
2OE
Description
output enable input (active LOW)
data input
ground (0 V)
data output
supply voltage
1Y
2A
Output
nY
L
H
Z
Dual bus buffer/line driver; 3-state
1
2
3
Transparent top view
74LVC2G125
74LVC2G125
© NXP B.V. 2010. All rights reserved.
7
6
5
001aae010
1OE
1A
2Y
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