74HCT2G34GV,125 NXP Semiconductors, 74HCT2G34GV,125 Datasheet - Page 8

• Manufacturer Part Number: 74HCT2G34GV,125
• Description: IC BUFFER DL NON-INV 6TSOP
• Manufacturer: NXP Semiconductors
• Series: 74HCTr

Specifications of 74HCT2G34GV,125

• Logic Type: Buffer/Line Driver, Non-Inverting
• Number Of Elements: 2
• Number Of Bits Per Element: 1
• Current - Output High, Low: 4mA, 4mA
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: SC-74-6
• Logic Family: HCT
• Number Of Channels Per Chip: 2
• Polarity: Non-Inverting
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• High Level Output Current: - 4 mA
• Low Level Output Current: 4 mA
• Minimum Operating Temperature: - 40 C
• Number Of Lines (input / Output): 2 / 2
• Propagation Delay Time: 18 ns at 4.5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 74HCT2G34GV-G; 74HCT2G34GV-G; 935281034125

NXP Semiconductors
Table 9.
Voltages are referenced to GND (ground = 0 V); for test circuit see
[1]
[2]
[3]
12. Waveforms
Table 10.
74HC_HCT2G34_1
Product data sheet
Symbol
74HCT2G34
t
t
C
Type
74HC2G34
74HCT2G34
pd
t
Fig 5. The data input (nA) to output (nY) propagation delays and output transition times
PD
t
t
C
P
f
f
C
V
N = number of inputs switching;
pd
t
i
o
(C
D
CC
is the same as t
PD
= input frequency in MHz;
L
= output frequency in MHz;
is the same as t
= output load capacitance in pF;
= C
L
is used to determine the dynamic power dissipation (P
= supply voltage in V;
Measurement points are given in
V
PD
V
OL
Parameter
propagation delay
transition time
power dissipation
capacitance
Dynamic characteristics
Measurement points
CC
and V
2
V
CC
f
o
2
OH
) = sum of the outputs.
TLH
PLH
f
are typical voltage output drop that occur with the output load.
i
and t
N + (C
and t
Input
V
0.5V
1.3 V
M
THL
PHL
CC
L
Conditions
nA to nY; see
V
nY; see
V
V
V
CC
CC
I
CC
= GND to V
nY output
2
…continued
nA input
= 4.5 V; C
= 4.5 V; C
Table
GND
f
V
V
o
Figure 5
) where:
OH
OL
V
10.
I
Figure 5
CC
L
L
Rev. 01 — 6 October 2006
V
GND to V
GND to 3.0 V
10 %
= 50 pF
= 50 pF
I
1.5 V
V
M
D
in W).
90 %
t
PLH
t
CC
TLH
[1]
[2]
[3]
Figure
74HC2G34; 74HCT2G34
Min
-
-
-
90 %
6.
V
t
6.0 ns
6.0 ns
M
25 C
r
Typ
= t
10
9
6
10 %
t
001aaf302
PHL
f
t
THL
Max
18
15
-
Min
-
-
-
40 C to +125 C
(85 C)
Output
V
0.5V
1.3 V
Max
23
19
M
-
© NXP B.V. 2006. All rights reserved.
CC
Dual buffer gate
(125 C)
Max
29
25
-
8 of 14
Unit
ns
ns
pF