74AHC2G126DP,125 NXP Semiconductors, 74AHC2G126DP,125 Datasheet

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Dual buffer/line driver; 3-state Rev. 5 — 24 March 2011 1. General description The 74AHC2G126 and 74AHCT2G126 are high-speed Si-gate CMOS devices. They provide a dual non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by ...

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... NXP Semiconductors 4. Marking Table 2. Marking codes Type number 74AHC2G126DP 74AHCT2G126DP 74AHC2G126DC 74AHCT2G126DC 74AHC2G126GD 74AHCT2G126GD [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram 1OE 2OE 7 mna946 Fig 1. Logic symbol 6. Pinning information 6.1 Pinning 74AHC2G126 ...

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... NXP Semiconductors 6.2 Pin description Table 3. Pin description Symbol Pin 1OE, 2OE GND 4 1Y Functional description [1] Table 4. Function table Control nOE [ HIGH voltage level LOW voltage level don’t care high-impedance OFF-state. 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). ...

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... NXP Semiconductors 9. Recommended operating conditions Table 6. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC V input voltage I V output voltage O T ambient temperature amb t/V input transition rise and fall rate 10. Static characteristics Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V) ...

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... NXP Semiconductors Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions C input I capacitance 74AHCT2G126 V HIGH-level input voltage V LOW-level input voltage V HIGH-level output voltage = 50  8 LOW-level output voltage = 50  8 OFF-state output current input leakage GND ...

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... NXP Semiconductors Table 8. Dynamic characteristics GND = 0 V; for test circuit see Figure Symbol Parameter Conditions t enable time nOE to nY; see disable time nOE to nY; see dis power per buffer; PD dissipation pF capacitance V = GND 74AHCT2G126 t propagation nA to nY; see pd delay ...

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... NXP Semiconductors Table 8. Dynamic characteristics GND = 0 V; for test circuit see Figure Symbol Parameter Conditions C power per buffer; PD dissipation pF capacitance V = GND [ the same as t and PLH PHL t is the same as t and PZL PZH t is the same as t and t . dis PLZ ...

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... NXP Semiconductors nOE input output LOW-to-OFF OFF-to-LOW output HIGH-to-OFF OFF-to-HIGH Measurement points are given in Logic levels: V and Fig 7. Enable and disable times Table 9. Measurement points Type Input V M 74AHC2G126 0.5V 74AHCT2G126 1.5 V 74AHC_AHCT2G126 Product data sheet 74AHC2G126; 74AHCT2G126 GND t PLZ V CC ...

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... NXP Semiconductors negative Test data is given in Table Definitions test circuit Termination resistance should be equal to output impedance Load capacitance including jig and probe capacitance Load resistance Test selection switch. Fig 8. Test circuit for measuring switching times Table 10. Test data Type Input V I 74AHC2G126 ...

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... NXP Semiconductors 13. Package outline TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0 pin 1 index 1 e DIMENSIONS (mm are the original dimensions UNIT max. 0.15 0.95 mm 1.1 0.25 0.00 0.75 Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. ...

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... NXP Semiconductors VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2 pin 1 index 1 e DIMENSIONS (mm are the original dimensions UNIT max. 0.15 0. 0.12 0.00 0.60 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. ...

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... NXP Semiconductors XSON8U: plastic extremely thin small outline package; no leads; 8 terminals; UTLP based; body 0.5 mm terminal 1 index area DIMENSIONS (mm are the original dimensions) A UNIT max 0.05 0.35 2.1 mm 0.5 0.00 0.15 1.9 OUTLINE VERSION IEC SOT996 Fig 11. Package outline SOT996-2 (XSON8U) ...

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... NXP Semiconductors 14. Abbreviations Table 11. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor CDM Charged Device Model DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 15. Revision history Table 12. Revision history Document ID 74AHC_AHCT2G126 v.5 Modifications: 74AHC_AHCT2G126 v ...

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... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...

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... NXP Semiconductors Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 17. Contact information For more information, please visit: For sales office addresses, please send an email to: 74AHC_AHCT2G126 Product data sheet 74AHC2G126 ...

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... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Functional description . . . . . . . . . . . . . . . . . . . 3 8 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 5 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 13 Package outline ...