74AHC2G126DP,125 NXP Semiconductors, 74AHC2G126DP,125 Datasheet - Page 2

IC BUFF DVR TRI-ST DL 8TSSOP

74AHC2G126DP,125

Manufacturer Part Number
74AHC2G126DP,125
Description
IC BUFF DVR TRI-ST DL 8TSSOP
Manufacturer
NXP Semiconductors
Series
74AHCr
Datasheet

Specifications of 74AHC2G126DP,125

Package / Case
8-TSSOP
Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
2
Number Of Bits Per Element
1
Current - Output High, Low
8mA, 8mA
Voltage - Supply
2 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
AHC
Number Of Channels Per Chip
2
Polarity
Non-Inverting
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
High Level Output Current
- 8 mA
Input Bias Current (max)
1 uA
Low Level Output Current
8 mA
Maximum Power Dissipation
250 mW
Minimum Operating Temperature
- 40 C
Output Current
25 mA
Output Type
3-State
Propagation Delay Time
11.5 ns @ 3 V to 3.6 V or 7.5 ns @ 4.5 V to 5.5 V
Number Of Lines (input / Output)
2 / 2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74AHC2G126DP-G
74AHC2G126DP-G
935274672125
NXP Semiconductors
4. Marking
Table 2.
[1]
5. Functional diagram
6. Pinning information
74AHC_AHCT2G126
Product data sheet
Type number
74AHC2G126DP
74AHCT2G126DP
74AHC2G126DC
74AHCT2G126DC
74AHC2G126GD
74AHCT2G126GD
Fig 1.
Fig 4.
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
2
1
5
7
Logic symbol
Pin configuration SOT505-2 (TSSOP8) and
SOT765-1 (VSSOP8)
1A
1OE
2A
2OE
Marking codes
GND
1OE
1A
2Y
6.1 Pinning
1
2
3
4
74AHCT2G126
74AHC2G126
mna946
1Y
2Y
001aaj262
6
3
8
7
6
5
All information provided in this document is subject to legal disclaimers.
Fig 2.
V
2OE
1Y
2A
CC
Rev. 5 — 24 March 2011
IEC logic symbol
2
1
5
7
74AHC2G126; 74AHCT2G126
EN1
mna947
Marking
A26
C26
A26
C26
A26
C26
Fig 5.
1
6
3
[1]
Pin configuration SOT996-2 (XSON8U)
GND
1OE
1A
2Y
1
2
3
4
Fig 3.
Transparent top view
nOE
74AHCT2G126
nA
74AHC2G126
Dual buffer/line driver; 3-state
Logic diagram (one buffer)
© NXP B.V. 2011. All rights reserved.
001aaj263
8
7
6
5
V
2OE
1Y
2A
CC
mna234
2 of 16
nY

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