74LVC2G241GD,125 NXP Semiconductors, 74LVC2G241GD,125 Datasheet - Page 11

IC BUFF DVR TRI-ST DL INV 8XSON

74LVC2G241GD,125

Manufacturer Part Number
74LVC2G241GD,125
Description
IC BUFF DVR TRI-ST DL INV 8XSON
Manufacturer
NXP Semiconductors
Series
74LVCr
Datasheet

Specifications of 74LVC2G241GD,125

Logic Type
Buffer/Line Driver, Non-Inverting
Package / Case
8-XSON
Number Of Elements
2
Number Of Bits Per Element
1
Current - Output High, Low
32mA, 32mA
Voltage - Supply
2 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
LVC
Number Of Channels Per Chip
2
Polarity
Non-Inverting
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.65 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
High Level Output Current
- 32 mA
Input Bias Current (max)
40 uA
Low Level Output Current
32 mA
Minimum Operating Temperature
- 40 C
Output Type
3-State
Propagation Delay Time
2.8 ns (Typ) @ 2.7 V
Number Of Lines (input / Output)
2 / 2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74LVC2G241GD-G
74LVC2G241GD-G
935286856125
NXP Semiconductors
Table 10.
74LVC2G241
Product data sheet
Supply voltage
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
3.0 V to 3.6 V
4.5 V to 5.5 V
Fig 10. Test circuit for measuring switching times
Test data is given in
Definitions for test circuit:
R
C
R
V
L
L
T
EXT
Test data
= Load resistor.
= Load capacitance including jig and probe capacitance.
= Termination resistance should be equal to output impedance Z
= Test voltage for switching times.
Input
V
V
V
2.7 V
2.7 V
V
I
CC
CC
CC
Table
10.
negative
positive
pulse
pulse
GENERATOR
0 V
0 V
Load
C
30 pF
30 pF
50 pF
50 pF
50 pF
V
V
I
I
PULSE
L
All information provided in this document is subject to legal disclaimers.
90 %
10 %
Rev. 10 — 6 August 2010
t
t
r
f
V
V
V
M
M
10 %
90 %
I
R
1 kΩ
500 Ω
500 Ω
500 Ω
500 Ω
L
R T
V
DUT
t
t
W
W
CC
o
V
t
open
open
open
open
open
of the pulse generator.
V
PLH
EXT
O
V
V
, t
M
M
PHL
t
t
r
f
C L
001aae235
V
EXT
R L
R L
Dual buffer/line driver; 3-state
t
GND
GND
GND
GND
GND
PZH
, t
74LVC2G241
PHZ
© NXP B.V. 2010. All rights reserved.
t
2 × V
2 × V
6 V
6 V
2 × V
PZL
, t
CC
CC
CC
PLZ
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