74LVC126APW/DG,118 NXP Semiconductors, 74LVC126APW/DG,118 Datasheet - Page 8
![IC BUFF DVR TRI-ST QD 14TSSOP](/photos/6/58/65814/568-14-tssop_sot402-1_sml.jpg)
74LVC126APW/DG,118
Manufacturer Part Number
74LVC126APW/DG,118
Description
IC BUFF DVR TRI-ST QD 14TSSOP
Manufacturer
NXP Semiconductors
Series
74LVCr
Datasheet
1.74LVC126APWDG118.pdf
(16 pages)
Specifications of 74LVC126APW/DG,118
Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
4
Number Of Bits Per Element
1
Current - Output High, Low
24mA, 24mA
Voltage - Supply
1.2 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
14-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74LVC126APW/DG-T
74LVC126APW/DG-T
935283542118
74LVC126APW/DG-T
935283542118
Philips Semiconductors
11. AC waveforms
Table 8.
74LVC126A_6
Product data sheet
Supply voltage
V
V
V
Fig 6. The input nA to output nY propagation delays
Fig 7. 3-state enable and disable times
CC
CC
CC
Σ(C
< 2.7 V
≥ 2.7 V
L
× V
V
V
V
Measurement points are given in
V
M
M
OL
OL
Measurement points
CC
= 1.5 V at V
= 0.5 × V
and V
and V
2
× f
o
OH
OH
) = sum of the outputs.
CC
are typical output voltage drops that occur with the output load.
are typical output voltage drops that occur with the output load.
CC
at V
≥ 2.7 V;
HIGH-to-OFF
OFF-to-HIGH
CC
LOW-to-OFF
OFF-to-LOW
nOE input
output
output
< 2.7 V;
Input
V
0.5 × V
1.5 V
M
nY output
CC
nA input
Table
GND
V
GND
V
V
OH
OL
CC
V
I
8.
GND
V
V
OH
OL
V
I
Rev. 06.00 — 16 May 2006
V
Quad buffer/line driver with 5 V tolerant input/outputs; 3-state
M
enabled
outputs
t
PLZ
Output
V
0.5 × V
1.5 V
t
PHZ
M
V
M
CC
V M
V
X
V
t
PHL
Y
disabled
outputs
V
V
V
t
PZL
X
OL
OL
t
PZH
mna237
+ 0.15 V
+ 0.3 V
t
PLH
V
M
mna684
V
M
outputs
enabled
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
74LVC126A
V
V
V
Y
OH
OH
− 0.15 V
− 0.3 V
8 of 16