74LVC16244ADL,112 NXP Semiconductors, 74LVC16244ADL,112 Datasheet - Page 9

IC BUFF DVR TRI-ST 16BIT 48SSOP

74LVC16244ADL,112

Manufacturer Part Number
74LVC16244ADL,112
Description
IC BUFF DVR TRI-ST 16BIT 48SSOP
Manufacturer
NXP Semiconductors
Series
74LVCr
Datasheet

Specifications of 74LVC16244ADL,112

Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
4
Number Of Bits Per Element
4
Current - Output High, Low
24mA, 24mA
Voltage - Supply
1.2 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
48-SSOP
Logic Family
LVC
Number Of Channels Per Chip
16
Polarity
Non-Inverting
Supply Voltage (max)
3.6 V
Supply Voltage (min)
1.2 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
High Level Output Current
- 24 mA
Low Level Output Current
24 mA
Minimum Operating Temperature
- 40 C
Number Of Lines (input / Output)
16 / 16
Output Type
3-State
Propagation Delay Time
11 ns at 1.2 V, 3 ns at 3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74LVC16244ADL
74LVC16244ADL
935235140112
NXP Semiconductors
Table 7.
Voltages are referenced to GND (ground = 0 V). For test circuit see
[1]
[2]
[3]
11. Waveforms
74LVC_LVCH16244A_9
Product data sheet
Symbol Parameter
C
Fig 7.
PD
t
t
t
Typical values are measured at T
C
P
f
C
V
N = number of inputs switching
Σ(C
pd
en
dis
i
D
CC
PD
= input frequency in MHz; f
L
is the same as t
is the same as t
= output load capacitance in pF
= C
is the same as t
L
is used to determine the dynamic power dissipation (P
= supply voltage in Volts
× V
power
dissipation
capacitance
Measurement points are given in
Logic levels: V
The input (nAn) to output (nYn) propagation delays
PD
Dynamic characteristics
CC
× V
2
× f
CC
o
2
) = sum of the outputs.
× f
PLH
PZL
PLZ
i
× N + Σ(C
OL
and t
and t
and t
and V
Conditions
per buffer; V
outputs enabled
outputs disabled
PZH
PHL
PHZ
o
= output frequency in MHz
OH
L
.
.
.
× V
amb
are typical output voltage levels that occur with the output load.
CC
nYn output
= 25 °C and V
nAn input
2
…continued
I
× f
= GND to V
Table
o
All information provided in this document is subject to legal disclaimers.
) where:
GND
V
V
8.
OH
OL
V
I
CC
Rev. 09 — 18 March 2010
t
PLH
CC
74LVC16244A; 74LVCH16244A
= 3.3 V.
; V
CC
D
16-bit buffer/line driver; 5 V input/output tolerant; 3-state
V
in μW).
M
= 3.3 V
V
M
Figure
[3]
Min
9.
-
-
−40 °C to +85 °C
V
M
V
M
t
PHL
mna171
Typ
4.0
12
Max
-
-
−40 °C to +125 °C Unit
Min
-
-
© NXP B.V. 2010. All rights reserved.
Max
-
-
9 of 19
pF
pF

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