HFA3861AIN Intersil Corporation, HFA3861AIN Datasheet - Page 29

• Manufacturer Part Number: HFA3861AIN
• Description: Processor, Direct Sequence Spread Spectrum Base band Processor
• Manufacturer: Intersil Corporation

Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bits 7:6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bits 7:0
Bit 7
Bit 6:0
CONFIGURATION REGISTER ADDRESS 35 (46h) R/W CMF COEFFICIENT CONTROL THRESHOLD
Selection bit for DAC input test mode 7
0 = Barker
1 = Low rate I/Q samples
force high rate mode
0 = normal
1 = force high rate mode
TX 44 clock enable
0 = Normal
1 = enabled
Tristate test bus and enable inputs
0 = Normal
1 = enable inputs on test bus
Disable spread sequence for 1 and 2Mbps
0 = Normal
1 = disabled
Disable scrambler
0 = normal scrambler operation
1 = scrambler disabled (taps set to 0)
PN generator enable (RX 44MHz clock)
0 = not enabled
1 = enabled. Bit must first be written to a ‘0’ before a ‘1’ to initialize logic.
PN generator enable (RX 22MHz clock)
0 = not enabled
1 = enabled. Bit must first be written to a ‘0’ before a ‘1’ to initialize logic.
Unused, set to 0
DC offset control
0 = enable DC offset compensation
1 = disable DC offset compensation
Bypass I/Q A/Ds.
0 = disable bypass
1 = 4 MSBs of I/Q data are input on test bus. TESTin 3:0 is [5:2], TESTin 7:4 is Q[5:2], LSBs are zeroed.
disable time adjust
0 = normal
1 = disabled
Internal digital loop back mode (SDI pin becomes LOCK input to acquisition block)
0 = normal chip operation loop back disabled
1 = loop back enabled, A/D and D/A converters bypassed, chip will not respond to external signals
enable PN to lower test bus address (2-0)
0 = normal
1 = PN to test bus address
enable PN to upper test bus address (7-3)
0 = normal
1 = PN to test bus address
address bits for various tests. See Tech Brief #TBD for a description of the factory test modes
Threshold control
0 = threshold is relative to noise floor
1 = threshold is absolute.
Threshold. For 100% calculated weights, set to 80h and set CR19[7:4] to 02h. For 100% default weights, set to 7fh and set
CR19[7:4] to 00h.
29
CONFIGURATION REGISTER ADDRESS 34 (44h) R/W TEST BUS ADDRESS
CONFIGURATION REGISTER 32 ADDRESS (40h) R/W TEST MODES 1
CONFIGURATION REGISTER ADDRESS 33 (42h) R/W TEST MODES 2
HFA3861A