SD1010-1199A N/A, SD1010-1199A Datasheet - Page 34

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SD1010-1199A

Manufacturer Part Number
SD1010-1199A
Description
Analog-Interface XGA TFT LCD Display Controller
Manufacturer
N/A
Datasheet
November, 1999
Revision B
SmartASIC, Inc.
Control_A
Control_B
Status 1
4
8
8
RW
RW
R
SmartASIC Confidential
2BH[3:0] Internal auto calibration state
2CH[7:0] Control Register A:
2DH[7:0] Control Register B
Bit 0: EEPROM vertical lookup table loading
Bit 1: EERPOM horizontal lookup table loading
Bit 2: EEPROM mode dependent entries loading
Bit 3: EEPROM calibration entries loading
Bit 4: input has too few lines
Bit 5: no input video
Bit 6: input data clock is too fast
Bit 7: refresh rate exceed LCD panel specification
0: Idle State
1-4: Loading EEPROM data
5-9: Frequency Calibration State (Auto Frequency
Calibration will be done after state 9)
10: Phase Calibration State (Auto Phase Calibration
will
11: Adjust Horizontal Back Porch state
12: Phase Tracking state
0 – disable
1 – enable
default is 00H
Bit 0: Horizontal Interpolation Offset Enable
Bit 1: Vertical Interpolation Offset Enable
Bit 2: Horizontal Interpolation Fraction Reset Enable
Bit 3: Vertical Interpolation Fraction Reset Enable
Bit 4: Horizontal Interpolation Integer Increment
Enable
Bit 5: Vertical Interpolation Integer Increment Enable
Bit 6: Single Pixel Output Mode Enable
Bit 7: Disable “DE_OUT”, for blanking screen purpose
Bit [2:0]: Pixel Comparison Mode:
0: compare r even(default)
1: compare g even
2: compare b even
3: invalid
4: compare r odd
5: compare g odd
6: compare b odd
7: invalid
*Using pixel comparison should program register
“Pixel Comparison Value” and check register “Status
2[1:0]”
Bit [4:3]: Brightness Control:
0: disable brightness control(default)
1: reduce brightness
2: increase brightness
3: invalid
*Using brightness control should specify register
“Brightness Adjustment” and check register “Status
2[2]”
be
done
after
SD1010A
state
34
10)

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