CS3410 Amphion Semiconductor Ltd., CS3410 Datasheet - Page 11

• Manufacturer Part Number: CS3410
• Description: High Speed Viterbi/TCM Decoder
• Manufacturer: Amphion Semiconductor Ltd.

BPERIOD
TPERIOD
THRES
CORE
SETUP
CORE
MODE
CORE
CONTROL
CORE
STATUS
BER
Register
0,1
2,3
4,5
6
7
8
9
10, 11
Address
0xFFFF
0xFFFF
0xFFFF
0x01
0x02
0x01
This regis-
ter is Read-
only
This regis-
ter is Read-
only
Table 5: CS3410 Configuration Register Details
Default
Value
BER count period value. Sets the range of an internal counter that is used to
determine the error rate of the communications channel (Viterbi mode only).
Normalization count period value. Sets the internal range of an internal
counter that is used to determine the synchronization status of the CS3410
(using THRES).
Threshold value is used in conjunction with accumulated-metric-normalization
count (over TPERIOD) to ascertain synchronization status of CS3410. If the
normalization count exceeds THRES then the core is deemed to be ‘out-of-
sync’ (SYNCS on output).
Bit
D2
D1
D0
D1
D0
D3
D2
D1
D0
D1
D0
Channel bit error rate register (Viterbi only)
SYNCS
ERR
Name
BLK
FSEL
VSD
RATE1
RATE0
SBD
AUTO
SWAP
DIFF
Synchronization status:
Core configuration error
Description
Block Mode
Viterbi input data format
Note: TCM requires sign magnitude formatted I/Q
vectors
Viterbi soft decision selector
Viterbi/TCM rate selector (see below)
TCM 2/3 = 00
TCM 3/4 = 01
VIT 1/2 = 10
VIT 1/3 = 11
Block Mode synchronization update control
Phase synchronization control
Viterbi erasure tracking control
Viterbi/TCM differential decoding control
synchronization is required
state toggles on every rising edge of CHSYNC
state toggles on every rising edge of OSYNC
(internally routed)
1: 4-bit Rx/soft decision vectors are processed by the
core.
0: Continuous
1: Block dependant (resets every block)
0: External synchronization control –Decoder sync
1: Automatic phase synchronization –Decoder sync
0: Direct mapping of R0/R1/R2ERASE flags
1: Internal swap/tracking of R0/R1/R2ERASE flags
0: Disable differential decoder/PARD
1: Enable differential decoder/PARD
0: Indicates perfect synchronization
1: Indicates that input data is rotated and
0: Continuous Operation
1: Block based operation
0: Signed magnitude
1: Offset binary
0: Hard decision, only MSBs of Rx vectors are utilized
Description
11
TM