S1D13700F02 Epson Electronics America, Inc., S1D13700F02 Datasheet - Page 42
S1D13700F02
Manufacturer Part Number
S1D13700F02
Description
Embedded Memory Graphics Lcd Controller
Manufacturer
Epson Electronics America, Inc.
Datasheet
1.S1D13700F02.pdf
(130 pages)
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9.2.2 FPSHIFT Clock
9.3 Oscillator Circuit
S1D13700F02
X42D-A-001-01
Note
The FPSHIFT clock is derived from the internal system clock as shown in Figure 9-1:
“Clock Diagram,” on page 41. The maximum frequency possible for FPSHIFT clock is
15MHz.
The S1D13700F02 design incorporates an oscillator circuit. A stable oscillator can be
constructed by connecting an AT-cut crystal, two capacitors, and two resistors to XCG1
and XCD1, as shown in the figure below. If the oscillator frequency is increased, Cd and
Cg should be decreased proportionally.
The circuit board lines to XCG1 and XCD1 must be as short as possible to prevent wir-
ing capacitance from changing the oscillator frequency or increasing the power con-
sumption.
Symbol
T
f
OSC
Rd
Cg
Cd
OSC
Rf
Table 9-1 Crystal Oscillator Circuit Parameters
S1D13700F02
Figure 9-2 Crystal Oscillator
XCG1
Cg
Min
⎯
⎯
⎯
⎯
2
3
Revision 1.01
Xtal
Rf
1/f
Typ
100
40
10
10
OSC
1
XCD1
Rd
Cd
Max
⎯
⎯
⎯
⎯
18
20
Units
MHz
M
pF
pF
ns
Ω
Epson Research and Development
Ω
Hardware Functional Specification
Vancouver Design Center
Issue Date: 2005/11/29
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