S1D13700F02 Epson Electronics America, Inc., S1D13700F02 Datasheet - Page 49
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S1D13700F02
Manufacturer Part Number
S1D13700F02
Description
Embedded Memory Graphics Lcd Controller
Manufacturer
Epson Electronics America, Inc.
Datasheet
1.S1D13700F02.pdf
(130 pages)
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Epson Research and Development
Vancouver Design Center
bit 3-0
bits 7-0
bits 7-0
Hardware Functional Specification
Issue Date: 2005/11/29
REG[02h] Vertical Character Size Register
Address = 8002h
REG[03h] Character Bytes Per Row Register
Address = 8003h
REG[04h] Total Character Bytes Per Row Register
Address = 8004h
7
7
7
6
6
6
Default = 00h
Default = 00h
Default = 00h
Note
Vertical Character Size (FY) bits [3:0]
These bits define the vertical size, or height, of each character, in pixels.
Character Bytes Per Row (C/R) bits [7:0]
These bits determine the size of each character row (or display line), in bytes, to a maxi-
mum of 253. The value of these bits is defined in terms of C/R which is calculated in Sec-
tion 15.1.1, “SYSTEM SET Command and Parameters” on page 101.
Total Character Bytes Per Row (TC/R) bits [7:0]
These bits set the length of one line, including horizontal blanking, in bytes, to a maxi-
mum of 255. The value of these bits is defined in terms of TC/R which is calculated in
Section 15.1.1, “SYSTEM SET Command and Parameters” on page 101. TC/R can be
adjusted to hold the frame period constant and minimize jitter for any given main oscilla-
tor frequency, fosc.
TC/R must be programmed such that the following formulas are valid.
n/a
REG[03h] bits 7-0 = ([C/R] x bpp) - 1
REG[04h] bits 7-0 = [TC/R] + 1
REG[02h] bits 3-0 = Vertical Character Size in pixels - 1
[TC/R] ≥ [C/R] + 2
2 ≤ TC/R ≤ 255
5
5
5
Total Character Bytes Per Row bits 7-0
Character Bytes Per Row bits 7-0
4
4
4
Revision 1.01
3
3
3
Vertical Character Size bits 3-0
2
2
2
1
1
1
Read/Write
Read/Write
Read/Write
X42D-A-001-01
S1D13700F02
0
0
0
Page 49
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