MT9HTF12872FY-667 Micron Semiconductor Products, MT9HTF12872FY-667 Datasheet

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MT9HTF12872FY-667

Manufacturer Part Number
MT9HTF12872FY-667
Description
512mb, 1gb X72, Sr 240-pin Ddr2 Sdram Fbdimm
Manufacturer
Micron Semiconductor Products
Datasheet
DDR2 SDRAM FBDIMM
MT9HTF6472F – 512MB
MT9HTF12872F – 1GB
For the component data sheet, refer to Micron’s Web site:
Features
• 240-pin, DDR2 fully-buffered dual in-line memory
• Fast data transfer rates: PC2-4200, PC2-5300, or
• 512MB (64 Meg x 72), 1GB (128 Meg x 72)
• 3.2 Gb/s, 4.0 Gb/s, and 4.8 Gb/s link transfer rates
• High-speed, 1.5V differential, point-to-point link
• Fault tolerant; can work around a bad bit lane in
• High-density scaling with up to eight FBDIMMs per
• SMBus interface to AMB for configuration register
• In-band and out-of-band command access
• Deterministic protocol
• Automatic DDR2 SDRAM bus and channel
• Transmitter de-emphasis to reduce ISI
• MBIST and IBIST test functions
• Transparent mode for DRAM test support
Table 1:
PDF: 09005aef81a2f1eb/Source: 09005aef81a2f20c
HTF9C64_128x72F.fm - Rev. B 9/07 EN
module (FBDIMM)
PC2-6400
between the host controller and advanced memory
buffer (AMB)
each direction
channel
access
– Enables memory controller to optimize DRAM
– Delivers precise control and repeatable memory
calibration
Speed
Grade
-80E
-667
-53E
accesses for maximum performance
behavior
Key Timing Parameters
Industry Nomenclature
Products and specifications discussed herein are subject to change by Micron without notice.
PC2-6400
PC2-5300
PC2-4200
CL = 5
800
667
512MB, 1GB (x72, SR) 240-Pin DDR2 SDRAM FBDIMM
Data Rate (MT/s)
www.micron.com
1
CL = 4
533
533
533
Figure 1:
Features (continued)
• V
• V
• V
• V
• Serial presence-detect (SPD) with EEPROM
• Gold edge contacts
• Single rank
• Supports 95°C operation with 2X refresh
Notes: 1. Not recommended for new designs.
PCB height: 30.35mm (1.19in)
Options
• Package
• Frequency/CAS latency
termination
– 240-pin DIMM (Pb-free)
– 2.5ns @ CL = 5 (DDR2-800)
– 3.0ns @ CL = 5 (DDR2-667)
– 3.75ns @ CL = 4 (DDR2-533)
REF
DD
CC
DDSPD
Micron Technology, Inc., reserves the right to change products or specifications without notice.
= 1.5V for AMB
= V
= 0.9V SDRAM command and address
DD
= +3.0V to +3.6V for AMB and EEPROM
CL = 3
400
400
Q = +1.8V for DRAM
240-Pin FBDIMM (MO-256 R/C A)
t
(ns)
12.5
RCD
15
15
©2005 Micron Technology, Inc. All rights reserved.
1
(ns)
12.5
t
15
15
RP
Marking
Features
-80E
-667
-53E
Y
(ns)
t
55
55
55
RC

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MT9HTF12872FY-667 Summary of contents

Page 1

DDR2 SDRAM FBDIMM MT9HTF6472F – 512MB MT9HTF12872F – 1GB For the component data sheet, refer to Micron’s Web site: Features • 240-pin, DDR2 fully-buffered dual in-line memory module (FBDIMM) • Fast data transfer rates: PC2-4200, PC2-5300, or PC2-6400 • 512MB ...

Page 2

... Data sheets for the base devices can be found on Micron’s Web page. 2. All part numbers end with a four-place code (not shown) that designates component, PCB, and AMB revisions. Consult factory for current revision codes. Example: MT9HTF12872FY-667E1D4. PDF: 09005aef81a2f1eb/Source: 09005aef81a2f20c HTF9C64_128x72F.fm - Rev. B 9/07 EN ...

Page 3

Pin Assignments and Descriptions Table 5: Pin Assignments 240-Pin FBDIMM Front Pin Symbol Pin Symbol Pin Symbol Pin Symbol PN3 PN3 ...

Page 4

Table 6: Pin Descriptions Symbol Type Description PS0–PS9 Input Primary southbound data, positive lines. PS0#–PS9# Input Primary southbound data, negative lines. SCK Input System clock input, positive line. SCK# Input System clock Input, negative line. SCL Input Serial presence-detect (SPD) ...

Page 5

Block Diagrams Figure 2: System Block Diagram 10 Memory 14 controller SMBus CK source Common clock source PDF: 09005aef81a2f1eb/Source: 09005aef81a2f20c HTF9C64_128x72F.fm - Rev. B 9/07 EN 512MB, 1GB (x72, SR) 240-Pin DDR2 SDRAM FBDIMM DDR2 connector with unique key DDR2 ...

Page 6

Figure 3: Functional Block Diagram CS0# DQS0 DQS0# DM0 DM DQ0 DQ DQ1 DQ DQ2 DQ DQ3 DQ DQ4 DQ DQ5 DQ DQ6 DQ DQ7 DQ DQS1 DQS1# DM5 DM DQ8 DQ DQ9 DQ DQ10 DQ DQ11 DQ DQ12 DQ ...

Page 7

General Description The Micron FBDIMMs. The following specifications contain detailed information on FBDIMM design, interfaces, and theory of operation, and are listed here for the system designers convenience. Refer to the JEDEC Web site for available specifications. • FBDIMM Design ...

Page 8

Electrical Specifications Stresses greater than those listed in Table 7 may cause permanent damage to the module. This is a stress rating only, and functional operation of the module at these or any other conditions outside those indicated in the ...

Page 9

I Conditions and Specifications DD Table 10: I Conditions DD Symbol Condition I _Idle_0 Idle current, single or last DIMM: L0 state; Idle (0 percent bandwidth); Primary channel DD enabled; Secondary channel disabled; CKE HIGH; Command and address lines stable; ...

Page 10

Table 11: I Specifications – 512MB DDR2-533 DD Symbol I _Idle_0 2,200 CC I 1,060 DD 1 5.5 Total power Table 12: I Specifications – 512MB DDR2-667 DD Symbol I _Idle_0 2,600 ...

Page 11

Serial Presence-Detect Table 17: Serial Presence-Detect EEPROM DC Operating Conditions Parameter/Condition EEPROM and AMB supply voltage Input high voltage: logic 1; all inputs Input low voltage: logic 0; all inputs Output low voltage 3mA OUT Input leakage current: ...

Page 12

Table 19: Serial Presence-Detect Matrix – DRAM Device and Module Byte Description 0 CRC range/SPD bytes total/bytes used 1 SPD revision 2 Key byte/DRAM device type 3 Voltage levels of this assembly 4 SDRAM addressing: Device rows/columns/banks 5 Module physical ...

Page 13

Table 19: Serial Presence-Detect Matrix – DRAM Device and Module (continued) Byte Description Bits 7:4: ΔT 33 (MAX) (DRAM case temperature difference between C MAX case temperature and baseline MAX case temperature), the baseline MAX case temperature is 85°C; Bits ...

Page 14

Table 20: Serial Presence-Detect Matrix – AMB and CRC Byte Description 80 FBDIMM reserved byte 81 Channel protocol supported (lower byte) 82 Channel protocol supported (upper byte) 83 Back-to-back turnaround clock cycles t 84 Buffer read access at CK for ...

Page 15

Table 20: Serial Presence-Detect Matrix – AMB and CRC (continued) Byte Description 114 AMB postinitialization bytes 115 AMB manufacturer’s ID code (lower byte) 116 AMB manufacturer’s ID code (upper byte) 126–127 CRC for bytes 0–116 (512MB/1GB) 150 Informal AMB revision ...

Page 16

Module Dimensions Figure 4: 240-Pin DDR2 FBDIMM 66.68 (2.63) TYP 0.5 (0.02) R (4X) 1.5 (0.059 (4X) 2.6 (0.102) D (2X) 5.2 (0.205) TYP 1.25 (0.0492) Pin 1 TYP 1.0 (0.039) TYP 9.9 (0.39) TYP 5.48 (0.216) (x4) ...

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