MT9VDDT1672PHG-265 Micron Semiconductor Products, MT9VDDT1672PHG-265 Datasheet - Page 10
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MT9VDDT1672PHG-265
Manufacturer Part Number
MT9VDDT1672PHG-265
Description
128mb Ddr Sdram Sodimm Mt9vddt1672phg-265
Manufacturer
Micron Semiconductor Products
Datasheet
1.MT9VDDT1672PHG-265.pdf
(33 pages)
(128MB.), A7–A12 (256MB, 512MB), or A7–A13 (1GB)
are reserved for future use and/or test modes. Test
modes and reserved states should not be used because
unknown operation or incompatibility with future ver-
sions may result.
Extended Mode Register
beyond those controlled by the mode register; these
additional functions are DLL enable/disable and out-
put drive strength. These functions are controlled via
the bits shown in the Extended Mode Register Defini-
tion Diagram. The extended mode register is pro-
grammed via the LOAD MODE REGISTER command
to the mode register (with BA0 = 1 and BA1 = 0) and
will retain the stored information until it is pro-
grammed again or the device loses power.
enabling of the DLL should always be followed by a
LOAD MODE REGISTER command to the mode regis-
ter (BA0, /BA1 both low) to reset the DLL.
all device banks are idle and no bursts are in progress,
and the controller must wait the specified time before
initiating any subsequent operation. Violating either
of these requirements could result in unspecified oper-
ation.
DLL Enable/Disable
DLL enable is required during power-up initialization
and upon returning to normal operation after having
disabled the DLL for the purpose of debug or evalua-
tion. (When the device exits self refresh mode, the DLL
is enabled automatically.) Any time the DLL is enabled,
200 clock cycles with CKE HIGH must occur before a
READ command can be issued.
pdf: 09005aef808ffe58, source: 09005aef808ffdc7
DD9C16_32_64_128x72PHG.fm - Rev. B 9/04 EN
All other combinations of values for A7–A11
The extended mode register controls functions
The extended mode register must be loaded when
The DLL must be enabled for normal operation.
128MB, 256MB, 512MB, 1GB (x72, ECC, PLL, SR)
The
10
NOTE:
128MB Module
256MB and 512MB Modules
1GB Module
2. QFC# is not supported.
E13
1. BA1 and BA0 (E13 and E12 for 128MB; E14 and E13 for
0
0
–
15
BA1 BA0
1
256MB, 512MB; or E15 and E14 for 1GB) must be “0, 1”
to select the Extended Mode Register (vs. the base
Mode Register).
Figure 6: Extended Mode Register
E12
0 1
1
14
200-PIN DDR SDRAM SODIMM
BA1 BA0
0
–
14
1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
0 1
1 1
13
E11
BA1 BA0
13
13
A13
0
–
1 1
12
12
E10
12
A2
A12
0
–
11
11
A11
A11
11
E9
A11
0
–
Definition Diagram
10
10
E8
A10
A10
10
0
–
A10
Operating Mode
Operating Mode
E7
9
9
0
–
A9
A9
9
Operating Mode
A9
E6 E5
0
–
8
8
A8
A8
8
A8
0
–
7
7
A7 A6 A5 A4 A3
7
A7 A6 A5 A4 A3
A7 A6 A5 A4 A3
E4
0
–
6
6
6
E3
0
–
5
5
5
©2004 Micron Technology, Inc. All rights reserved.
E2
0
–
4
4
4
3
3
3
E1,
Valid
–
2
2
A2 A1 A0
2
E0
A2 A1 A0
A2 A1 A0
DS
DS
DS
1
1
1
E1
DLL
DLL
0
DLL
0
0
Operating Mode
Reserved
Reserved
0
ADVANCE
E0
0
1
Extended Mode
Register (Ex)
Extended Mode
Register (Ex)
Drive Strength
Extended Mode
Register (Ex)
Address Bus
Address Bus
Address Bus
Normal
Disable
Enable
DLL