UMA1015AM NXP Semiconductors, UMA1015AM Datasheet - Page 6

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UMA1015AM

Manufacturer Part Number
UMA1015AM
Description
Low-power Dual Frequency Synthesizer For Radio Communications
Manufacturer
NXP Semiconductors
Datasheet

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Table 2 Bit allocation
Note
1. The test register should not be programmed with any other values except all zeros for normal operation.
Table 3 Bit allocation description
Table 4 Out-of-lock select
FIRST
p1
dt16
X
MA16
0
MB16
0
sPDA, sPDB
sPBF
P3, P2, P1 and P0
VDON
OLA, OLB
CRA, CRB
SR
SYMBOL
OLA
p2
dt15 dt14
X
0
0
0
0
1
1
p3
VDON PO
0
0
p4
dt13 dt12
0
0
software power-down for synthesizers A and B (0 = power-down)
software power-on for f
bits output to pins 1, 2, 9 and 19 (1 = high impedance)
voltage doubler enable (1 = doubler enabled)
out-of-lock select; selects signal output to pin 19 (see Table 4)
charge pump A/B current to I
reference frequency ratio select (see Table 6)
p5
OLA OLB CRA CRB X
SR
0
OLB
0
1
0
1
SYNTHESIZER A MAIN DIVIDER COEFFICIENT
SYNTHESIZER B MAIN DIVIDER COEFFICIENT
p6
R11
0
p7
0
xtal
P0
lock status of loop B; OOLB
lock status of loop A; OOLA
logic OR function of loops A and B
RESERVED FOR TEST
buffer (1 = buffer on)
p8
0
SET
DATA FIELD
ratio select (see Table 5)
p9
0
REGISTER BIT ALLOCATION
REFERENCE DIVIDER COEFFICIENT
p10
X
0
p11
sPDA sPDB P3
0
(1)
DESCRIPTION
p12
0
p13
dt4
0
OUTPUT AT PIN 19
p14
dt3
P2
0
p15
dt2
P1
sPBF 0
p16
dt1
X
p17
dt0
X
MA0
R0
MB0
0
p18
0
0
0
0
0
1
p19
ADDRESS
0
1
1
1
0
0
p20
0
0
0
1
0
0
p21
LAST
1
0
1
0
0
0

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