TEF6730A NXP Semiconductors, TEF6730A Datasheet - Page 23
TEF6730A
Manufacturer Part Number
TEF6730A
Description
Tef6730a Front-end For Digital-if Car Radio
Manufacturer
NXP Semiconductors
Datasheet
1.TEF6730A.pdf
(58 pages)
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NXP Semiconductors
TEF6730A_1
Product data sheet
8.2.3 Write mode: data byte PLLM
8.2.4 Write mode: data byte PLLL
8.2.5 Write mode: data byte DAA
Table 15.
Table 16.
Table 17.
Table 18.
Table 19.
Table 20.
Bit
1
0
Bit
7
6 to 0
Bit
7 to 0
AGCSW
CPOFF
PLL7
7
0
7
0
7
0
Symbol
DAASW
CFSW
Symbol
CPOFF
PLL[14:8]
Symbol
PLL[7:0]
CONTROL - data byte 0h bit description
PLLM - data byte 1h bit allocation with default setting
PLLM - data byte 1h bit description
PLLL - data byte 2h bit allocation with default setting
PLLL - data byte 2h bit description
DAA - data byte 3h bit allocation with default setting
PLL14
DAA6
PLL6
6
0
6
1
6
1
Rev. 01 — 21 February 2007
PLL13
DAA5
Description
antenna DAA mode in FM
ceramic filter switch
Description
charge pump off
upper byte of PLL divider word
PLL5
Description
lower byte of PLL divider word; PLL[14:0] is the divider ratio N of the
VCO programmable divider; N = 1024 to 32767
5
0
5
1
5
0
0 = standard; DAA output voltage is controlled by V
1 = DAA output voltage is a fixed temperature stable voltage
controlled by the DAA setting (independent of V
0 = CFSW1 pin active (low-impedance) and CFSW2 pin inactive
(high-impedance)
1 = CFSW2 pin active (low-impedance) and CFSW1 pin inactive
(high-impedance)
0 = standard operation
1 = charge pump deactivated
PLL12
DAA4
PLL4
4
0
4
1
4
0
PLL11
DAA3
PLL3
3
1
3
1
3
0
…continued
Front-end for digital-IF car radio
PLL10
DAA2
PLL2
2
0
2
1
2
0
TEF6730A
DAA1
PLL9
PLL1
tune
© NXP B.V. 2007. All rights reserved.
1
0
1
1
1
0
)
tune
DAA0
PLL8
PLL0
23 of 58
0
0
0
0
0
0
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