EVX10AS008BGL ETC-unknow, EVX10AS008BGL Datasheet - Page 10

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EVX10AS008BGL

Manufacturer Part Number
EVX10AS008BGL
Description
Adc Single 2.2gsps 10-bit Lvds 152-pin Cbga
Manufacturer
ETC-unknow
Datasheet
Table 3-5.
Notes:
3.4
Table 3-6.
Only minimum and maximum values are guaranteed (typical values are issuing from characterization results).
Notes:
10
Parameter
Output rise/fall time for data ready
(20% to 80%)
Data output delay
Data ready output delay
Output Data to Data Ready propagation delay
Data ready to output data propagation delay
Output data pipeline delay
Data ready reset delay
1
2
3
4
5
100% production tested at +25 °C
100% production tested at +25 °C
Sample tested only at specified temperatures
Parameter is guaranteed by design and characterization testing (thermal steady-state conditions at specified temperature)
Parameter is a typical value only guaranteed by design only
1. Output error amplitude < ± 32 lsb. Fs = 2.2 Gsps T
2.
3. 50Ω // C
4. TOD and TDR propagation times are defined at package input/outputs. They are given for reference only
5. Values for TD1 and TD2 are given for a 2.2 Gsps external clock frequency (50% duty cycle). For different sampling rates,
Explanation of Test Levels
1. Unless otherwise specified.
2. Refer to
0811A–BDC–12/08
See “Definition of Terms” on page 31.
value: 50 ps/pF.
apply the following formula: TD1 = T/2 +(|TOD – TDR|) and TD2 = T/2 +(|TOD –TDR|), where T = clock period.
This places the rising edge (True-False) of the differential data ready signal in the middle of the output data valid window.
This gives maximum setup and hold times for external data acquisition.
(3)
Transient and Switching Performances (Continued)
Explanation of Test Levels
(4)
LOAD
“Ordering Information” on page
(4)
= 2 pF termination (for each single-ended output). Termination rise/ fall time load parasitic capacitance derating
See “Timing Information” on page 33.
(1)
(1)
, and sample tested at specified temperatures (for V temperature ranges
(for C temperature range
(5)
(5)
43.
Level
Test
4
4
4
4
4
4
4
4
J
= 110°C
(2)
TR/TF
TOD
TDR
|TOD–TDR|
TD1
TD2
TPD
TRDR
)
Symbol
Min
–50
200
150
300
Typ
360
360
250
200
4.0
80
0
e2v semiconductors SAS 2008
EV10AS008B
Max
+ 50
110
250
250
(2)
)
ps
ps
ps
ps
ps
ps
Clock
Cycles
ps
Unit

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