MC56F8345 Freescale Semiconductor, Inc, MC56F8345 Datasheet - Page 35

• Manufacturer Part Number: MC56F8345
• Description: 56f8300 16-bit Digital Signal Controllers
• Manufacturer: Freescale Semiconductor, Inc

Freescale Semiconductor
Preliminary
EMI_MODE
EXTBOOT
RESET
Signal
Name
RSTO
Table 2-2 Signal and Package Information for the 128-Pin LQFP
Pin No.
Internal
Ground
Internal
Ground
78
77
Schmitt
Schmitt
Schmitt
Output
Type
Input
Input
Input
56F8345 Technical Data, Rev. 17
enabled
enabled
enabled
During
pull-up
Output
pull-up
pull-up
Reset
Input,
Input,
Input,
State
Reset — This input is a direct hardware reset on the processor.
When RESET is asserted low, the device is initialized and placed
in the reset state. A Schmitt trigger input is used for noise
immunity. The internal reset signal will be deasserted
synchronous with the internal clocks after a fixed number of
internal clocks.
To ensure complete hardware reset, RESET and TRST should
be asserted together. The only exception occurs in a debugging
environment when a hardware device reset is required and the
JTAG/EOnCE module must not be reset. In this case, assert
RESET, but do not assert TRST.
Note: The internal Power-On Reset will assert on initial
power-up.
To deactivate the internal pull-up resistor, set the RESET bit in
the SIM_PUDR register. See
Reset Output — This output reflects the internal reset state of
the chip.
External Boot — This input is tied to V
boot from off-chip memory (assuming that the on-chip Flash
memory is not in a secure state). Otherwise, it is tied to ground.
For details, see
Note: When this pin is tied low, the customer boot software
should disable the internal pull-up resistor by setting the XBOOT
bit of the SIM_PUDR; see
Note: This pin is internally tied low (to V
External Memory Mode — This device will boot from internal
Flash memory under normal operation.
This function is also affected by EXTBOOT and the Flash
security mode; see
Note: When this pin is tied low, the customer boot software
should disable the internal pull-up resistor by setting the
EMI_MODE bit of the SIM_PUDR; see
Note: This pin is internally tied low (to V
Table
Table 4-4
Signal Description
4-4.
Part
Part
for details.
6.5.6.
6.5.6. for details.
DD
Part
SS
SS
).
to force the device to
).
6.5.6.
Signal Pins
35