MC56F8345 Freescale Semiconductor, Inc, MC56F8345 Datasheet - Page 5
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MC56F8345
Manufacturer Part Number
MC56F8345
Description
56f8300 16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC56F8345.pdf
(164 pages)
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56F8345/56F8145 General Description
Note: Features in italics are NOT available in the 56F8145 device.
Freescale Semiconductor
Preliminary
• Up to 60 MIPS at 60MHz core frequency
• DSP and MCU functionality in a unified,
• 128KB Program Flash
• 4KB Program RAM
• 8KB Data Flash
• 8KB Data RAM
• 8KB Boot Flash
• Up to two 6-channel PWM modules
• Four 4-channel, 12-bit ADCs
• Temperature Sensor
C-efficient architecture
4
4
3
4
4
5
4
3
4
4
4
4
2
2
6
6
AD1
TEMP_SENSE
PWM Outputs
Current Sense Inputs
or GPIOC
Fault Inputs
PWM Outputs
Current Sense Inputs
or GPIOD
Fault Inputs
AD0
VREF
AD0
AD1
Decoder 0 or
Decoder 1 or
C or GPIOE
Quad Timer
Quad Timer
D or GPIOE
Quadrature
Quadrature
Timer A or
Timer B or
FlexCAN
GPIOC
SP1I or
GPIOC
Quad
Quad
ADCB
ADCA
Decoding
Peripherals
Program Memory
64K x 16 Flash
Data Memory
4K x 16 Flash
4K x 16 RAM
2K x 16 RAM
4K x 16 Boot
Memory
Flash
PWMA
56F8345/56F8145 Block Diagram - 128 LQFP
PWMB
SPI0 or
GPIOE
4
Program Controller
Device Selects
XDB2
XAB1
XAB2
PAB
PDB
CDBR
CDBW
SCI1 or
GPIOD
and Hardware
Peripheral
Looping Unit
RSTO
2
RESET
56F8345 Technical Data, Rev. 17
SCI0 or
GPIOE
PAB
CDBR
CDBW
PDB
IPBus Bridge (IPBB)
2
Control
Generation Unit
RW
EOnCE
5
JTAG/
Port
Watchdog
Address
COP/
IPAB
2
V
PP
56800E Core
IRQA IRQB
Controller
Interrupt
IPWDB
4
V
16-Bit
CAP
Three 16-bit Input Registers
16 x 16 + 36 -->36-Bit MAC
System Bus
Four 36-bit Accumulators
• Up to two Quadrature Decoders
• FlexCAN module
• Optional On-Chip Regulator
• Two Serial Communication Interfaces (SCIs)
• Up to two Serial Peripheral Interface (SPIs)
• Up to four general-purpose Quad Timers
• Computer Operating Properly (COP)/Watchdog
• JTAG/Enhanced On-Chip Emulation (OnCE™) for
• Up to 49 GPIO lines
• 128-pin LQFP Package
7
V
Control
unobtrusive, real-time debugging
OCR_DIS
DD
Digital Reg
IPRDB
Data ALU
Integration
5
V
System
R/W Control
Module
Low Voltage
CLKO
Supervisor
SS
2
V
resets
Clock
Analog Reg
DDA
P
O
R
V
CLKMODE
Manipulation
Generator
SSA
Address Bus
Bus Switch
* External
* External
Clock
Control
Switch
* Bus
Unit
Data
Bit
PLL
O
S
C
6
4
5
6
* EMI not functional in
this package; use as
GPIO pins
EXTAL
XTAL
A8-13 or GPIOA0-5
GPIOB0-4 or A16-20
D7-10 or GPIOF0-3
GPIOD0-5 or CS2-7
5