DSPIC30F2012 Microchip Technology Inc., DSPIC30F2012 Datasheet - Page 121

• Manufacturer Part Number: DSPIC30F2012
• Description: Dspic30f2011/2012/3012/3013 High-performance Digital Signal Controllers
• Manufacturer: Microchip Technology Inc.

17.0
There are several features intended to maximize sys-
tem reliability, minimize cost through elimination of
external components, provide Power Saving Operating
modes and offer code protection:
• Oscillator Selection
• Reset
• Watchdog Timer (WDT)
• Low-Voltage Detect
• Power-Saving Modes (Sleep and Idle)
• Code Protection
• Unit ID Locations
• In-Circuit Serial Programming (ICSP)
dsPIC30F devices have a Watchdog Timer which is
permanently enabled via the Configuration bits or can
be software controlled. It runs off its own RC oscillator
for added reliability. There are two timers that offer
necessary delays on power-up. One is the Oscillator
Start-up Timer (OST), intended to keep the chip in
Reset until the crystal oscillator is stable. The other is
the Power-up Timer (PWRT) which provides a delay on
power-up only, designed to keep the part in Reset while
the power supply stabilizes. With these two timers
on-chip, most applications need no external Reset
circuitry.
Sleep mode is designed to offer a very low current
Power-Down mode. The user can wake-up from Sleep
through external Reset, Watchdog Timer Wake-up, or
through an interrupt. Several oscillator options are also
made available to allow the part to fit a wide variety of
applications. In the Idle mode, the clock sources are
still active but the CPU is shut-off. The RC oscillator
option saves system cost while the LP crystal option
saves power.
© 2006 Microchip Technology Inc.
Note: This data sheet summarizes features of this group
of dsPIC30F devices and is not intended to be a complete
reference source. For more information on the CPU,
peripherals, register descriptions and general device
functionality, refer to the “dsPIC30F Family Reference
Manual” (DS70046). For more information on the device
instruction set and programming, refer to the “dsPIC30F/
33F Programmer’s Reference Manual” (DS70157).
- Power-on Reset (POR)
- Power-up Timer (PWRT)
- Oscillator Start-up Timer (OST)
- Programmable Brown-out Reset (BOR)
SYSTEM INTEGRATION
dsPIC30F2011/2012/3012/3013
17.1
The dsPIC30F oscillator system has the following
modules and features:
• Various external and internal oscillator options as
• An on-chip PLL to boost internal operating
• A clock switching mechanism between various
• Programmable clock postscaler for system power
• A Fail-Safe Clock Monitor (FSCM) that detects
• Clock Control register (OSCCON)
• Configuration bits for main oscillator selection
Configuration bits determine the clock source upon
Power-on Reset (POR) and Brown-out Reset (BOR).
Thereafter, the clock source can be changed between
permissible clock sources. The OSCCON register con-
trols the clock switching and reflects system clock
related status bits.
Table 17-1 provides a summary of the dsPIC30F Oscil-
lator Operating modes. A simplified diagram of the
oscillator system is shown in Figure 17-1.
clock sources
frequency
clock sources
savings
clock failure and takes fail-safe measures
Oscillator System Overview
DS70139E-page 119