DSPIC33FJ64GP306 Microchip Technology Inc., DSPIC33FJ64GP306 Datasheet - Page 69

• Manufacturer Part Number: DSPIC33FJ64GP306
• Description: High-performance, 16-bit Digital Signal Controllers
• Manufacturer: Microchip Technology Inc.

4.0
The dsPIC33FJXXXGPX06/X08/X10 devices contain
internal Flash program memory for storing and execut-
ing application code. The memory is readable, writable
and erasable during normal operation over the entire
V
Flash memory can be programmed in two ways:
1.
2.
ICSP allows a dsPIC33FJXXXGPX06/X08/X10 device
to be serially programmed while in the end application
circuit. This is simply done with two lines for program-
ming clock and programming data (one of the alternate
programming pin pairs: PGC1/PGD1, PGC2/PGD2 or
PGC3/PGD3), and three other lines for power (V
ground (V
customers to manufacture boards with unprogrammed
devices and then program the digital signal controller
FIGURE 4-1:
© 2007 Microchip Technology Inc.
DD
Note:
In-Circuit Serial Programming™ (ICSP™)
programming capability
Run-Time Self-Programming (RTSP)
range.
FLASH PROGRAM MEMORY
SS
This data sheet summarizes the features
of this group of dsPIC33FJXXXGPX06/
X08/X10 devices. It is not intended to be a
comprehensive reference source. To com-
plement the information in this data sheet,
refer to the “dsPIC33F Family Reference
Manual”. Please refer to the Microchip
web site (www.microchip.com) for the lat-
est dsPIC33F Family Reference Manual
sections.
) and Master Clear (MCLR). This allows
Using
Program Counter
Using
Table Instruction
User/Configuration
Space Select
ADDRESSING FOR TABLE REGISTERS
1/0
dsPIC33FJXXXGPX06/X08/X10
0
TBLPAG Reg
8 bits
DD
),
Program Counter
24-bit EA
24 bits
just before shipping the product. This also allows the
most recent firmware or a custom firmware to be pro-
grammed.
RTSP is accomplished using TBLRD (table read) and
TBLWT (table write) instructions. With RTSP, the user
can write program memory data either in blocks or
‘rows’ of 64 instructions (192 bytes) at a time or a single
program memory word, and erase program memory in
blocks or ‘pages’ of 512 instructions (1536 bytes) at a
time.
4.1
Regardless of the method used, all programming of
Flash memory is done with the table read and table
write instructions. These allow direct read and write
access to the program memory space from the data
memory while the device is in normal operating mode.
The 24-bit target address in the program memory is
formed using bits<7:0> of the TBLPAG register and the
Effective Address (EA) from a W register specified in
the table instruction, as shown in Figure 4-1.
The TBLRDL and the TBLWTL instructions are used to
read or write to bits<15:0> of program memory.
TBLRDL and TBLWTL can access program memory in
both Word and Byte modes.
The TBLRDH and TBLWTH instructions are used to read
or write to bits<23:16> of program memory. TBLRDH
and TBLWTH can also access program memory in Word
or Byte mode.
Working Reg EA
16 bits
Table Instructions and Flash
Programming
0
Byte
Select
DS70286A-page 67