HN29W12811 Renesas Electronics Corporation., HN29W12811 Datasheet - Page 6

• Manufacturer Part Number: HN29W12811
• Description: 128m And Type Flash Memory More Than 8,029-sector 135,657,984-bit
• Manufacturer: Renesas Electronics Corporation.

HN29W12811 Series
Pin Function
CE: CE is used to select the device. The status returns to the standby at the rising edge of CE in the reading
operation. However, the status does not return to the standby at the rising edge of CE in the busy state in
programming and erase operation.
OE: Memory data and status register data can be read, when OE is V
WE: Commands and address are latched at the rising edge of WE.
SC: Programming and reading data is latched at the rising edge of SC.
RES: RES pin must be kept at the V
in the memory is protected against unintentional erase and programming. RES must be kept at the V
± 0.2 V) level during any operations such as programming, erase and read.
CDE: Commands and data are latched when CDE is V
RDY/Busy: The RDY/Busy indicates the program/erase status of the flash memory. The RDY/Busy signal
is initially at a high impedance state. It turns to a V
operation or the (B0H) command in erase operation. After the erase or programming operation finishes, the
RDY/Busy signal turns back to the high impedance state.
I/O0 to I/O7: The I/O pins are used to input data, address and command, and are used to output memory data
and status register data.
Mode Selection
Mode
Deep standby
Standby
Output disable
Status register read*
Command write*
Notes: 1. Default mode after the power on is the status register read mode (refer to status transition). From
6
2. Refer to the command definition. Data can be read, programmed and erased after commands are
3. The RDY/Busy bus should be pulled up to V
4. An
I/O0 to I/O7 pins output the status, when CE = V
condition).
written in this mode.
outputs a high impedance.
2
means “Don’t care”. The pin level can be set to either V
1
CE
V
V
V
V
*
IH
IL
IL
IL
4
OE
V
V
V
ILR
IH
IL
IH
(V
SS
WE
V
V
V
IH
IH
IL
± 0.2 V) level when V
SC
V
IL
IL
CC
O L
and address is latched when CDE is V
to maintain the V
RES
V
V
V
V
V
level after the (40H) command in programming
IL
ILR
IHR
IHR
IHR
IHR
and OE = V
CDE RDY/Busy*
V
IL
CC
IL
.
is turned on and off. In this way, data
V
V
V
V
V
IL
IL
OH
OH
OH
OH
OH
or V
(conventional read operation
OH
level while the RDY/Busy pin
IH
referred to DC characteristics.
3
I/O0 to I/O7
High-Z
High-Z
High-Z
Status register outputs
Din
IH
.
IHR
(V
CC