HMP41GF7MMP8C Hynix Semiconductor, HMP41GF7MMP8C Datasheet - Page 10

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HMP41GF7MMP8C

Manufacturer Part Number
HMP41GF7MMP8C
Description
240pin Fully Buffered Ddr2 Sdram Dimms
Manufacturer
Hynix Semiconductor
Datasheet
Rev 0.1 / May 2008
Advanced Memory Buffer(AMB) DRAM Interface Specifications
Plsease refer to the AMB Specification for all technical requirements
The following specifications for the AMB constitute the subset which is critical for proper operation of the
DDR2 SDRAM interface.
Note:
This list is not complete, more information will follow in later revisions of this specification.
Critical AMB Specifications
Note 1:
The timing numbers are for example only. Design should be based on the latest component specifications
tDQSCKamb
tDVBamb
tDVAamb
tCVBamb
tCVAamb
Symbol
tSU
C
tH
IN
DQ to DQS / DQS setup time (read)
DQ to DQS / DQS hold time (read)
Input Capacitance(DQ/DQS/DQS)
DQS/DQS-to-CK/CK output skew
C/A/CNTL Valid Before Clock
AMB Data Valid Before DQS
C/A/CNTL Valid After Clock
AMB Data Valid After DQS
Parameter
1
240pin Fully Buffered DDR2 SDRAM DIMMs
Output
Output
Output
Output
Output
Type
Input
Input
VDDQ =1.8V +/-0.1V
1030
-240
Min
470
470
890
2.0
Max
245
245
240
2.5
Units Notes
pF
ps
ps
ps
ps
ps
ps
ps
1
1
1
1
1
1
1
1
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