VND5012AK STMicroelectronics, VND5012AK Datasheet
VND5012AK
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VND5012AK Summary of contents
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... Thermal shut down ■ Reverse battery protection (see ■ Electrostatic discharge protection Description The VND5012AK-E a monolithic device made using STMicroelectronics VIPower M0-5 technology intended for driving resistive or inductive loads with one side connected to ground. Active V device against low energy spikes (see ISO7637 transient compatibility table) ...
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... Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3 Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.1 GND Protection Network Against Reverse Battery . . . . . . . . . . . . . . . . . 15 3.1.1 3.1.2 3.2 Load Dump Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.3 µC I/Os PROTECTION Package and PCB Thermal Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.1 PowerSSO-24 Thermal Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5.1 Package Mechanical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5.2 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 2/22 Solution Solution VND5012AK-E ...
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... VND5012AK-E 1 Block diagram and pin description Figure 1. Block Diagram V CC CLAMP GND INPUT1 LOGIC INPUT2 CS_DIS Table 1. Pin Function Name V Battery connection CC OUTPUT Power output 1,2 GND Ground connection. Must be reverse battery protected by an external diode/resistor network INPUT Voltage controlled input pin with hysteresis, CMOS compatible. Controls output switch state ...
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... I CSD CS_DIS CSD I IN1 INPUT1 V IN1 I IN2 INPUT2 V IN2 GND I GND - V during reverse battery condition CC Parameter =0Ω; V =13.5V; T =150° bat jstart VND5012AK (*) F I OUT1 OUTPUT1 V OUT1 I CURRENT SENSE1 SENSE1 V SENSE1 I OUT2 OUTPUT2 V OUT2 I CURRENT SENSE2 SENSE2 V ...
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... VND5012AK-E 2.2 Thermal Data Table 3. Thermal Data Symbol R Thermal resistance junction-case (MAX) (With one channel ON) thj-case R Thermal resistance junction-ambient (Max.) thj-amb 2.3 Electrical Characteristics 8V<V <36V; -40°C<T CC Table 4. Power section Symbol Parameter V Operating supply voltage CC V Undervoltage shutdown USD Undervoltage shut-down V USDhyst hysteresis R On state resistance ...
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... Test Conditions V =13V CC 5V<V <36V CC V =13V T <T < TSD -T ) TSD R T >T j TSD I =2A; V =0; L=6mH OUT IN I =0.4A -40°C...+150°C OUT j (see Figure 24) VND5012AK-E Min. Typ. Max. Unit 0.9 V µA 1 2.1 V µA 10 0. -0.7 V 0.9 V µA 1 2.1 V µA 10 0. -0.7 V Min. ...
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... VND5012AK-E Table 8. Current Sense (8V<V Symbol Parameter OUT SENSE OUT SENSE OUT SENSE OUT SENSE Analog sense leakage I SENSE0 current Max analog sense V SENSE output voltage Analog sense output voltage in V SENSEH overtemperature condition ...
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... Vs. I (see Table 8 for details) SENSE OUT Iout/Isense 9000 max Tj= -40ºC to 150ºC 8000 7000 max Tj=25...150ºC 6000 typical value 5000 min Tj=25...150ºC 4000 3000 min Tj=-40ºC to 150ºC 2000 Iout (A) VND5012AK DSENSE1H DSENSE2L ...
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... VND5012AK-E Table 9. Truth table CONDITIONS Normal operation Overtemperature Undervoltage Short circuit to GND ≤ 10 mΩ Short circuit Negative output voltage clamp (1) If the V is high, the SENSE output high impedance, its potential depends on leakage currents CSD and external circuit. ...
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... TEST LEVEL RESULTS III CONTENTS VND5012AK-E Delays and time Impedance 2 ms, 10 Ω µs, 2 Ω 0.1 µs, 50 Ω 100 ms 0.1 µs, 50 Ω 100 ms 100 ms, 0.01 Ω 400 ms, 2 Ω ...
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... VND5012AK-E Figure 8. Waveforms INPUT CS_DIS LOAD CURRENT SENSE CURRENT V CC INPUT CS_DIS LOAD CURRENT SENSE CURRENT INPUT CS_DIS LOAD VOLTAGE LOAD CURRENT SENSE CURRENT T j INPUT CS_DIS LOAD CURRENT SENSE CURRENT NORMAL OPERATION UNDERVOLTAGE V USDhyst V USD SHORT TO V <Nominal OVERLOAD OPERATION ...
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... Vih (V) 4 3.5 3 2.5 2 1.5 1 0.5 0 100 125 150 175 -50 Figure 14. Input Hysteresis Voltage Vhyst (V) 1 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 100 125 150 175 -50 VND5012AK-E Vin=2.1V - 100 125 150 Tc (°C) - 100 125 150 Tc (°C) - 100 125 150 Tc (°C) 175 175 175 ...
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... VND5012AK-E Figure 15. On State Resistance Vs. T Ron (mOhm Iout=5A 40 Vcc=13V -50 - (°C) Figure 17. Undervoltage Shutdown Vusd ( -50 - (°C) Figure 19. Turn-on Voltage Slope (dVout/dt)on (V/ms) 1000 900 Vcc=13V 800 Rl=2 ...
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... Tc (°C) Figure 23. CS_DIS Low Level Voltage Vcsdl (V) 4 3.5 3 2.5 2 1.5 1 0.5 0 -50 - (°C) 14/22 Figure 22. CS_DIS Clamp Voltage Vcsdcl (V) 8 7.5 7 6.5 6 5.5 5 4.5 4 -50 100 125 150 175 100 125 150 175 VND5012AK-E Icsd=1mA - 100 125 150 Tc (°C) 175 ...
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... VND5012AK-E 3 Application Information Figure 24. Application schematic +5V R prot µC R prot R prot R SENSE C ext Note: Channel 2 has the same internal circuit as channel 1. 3.1 GND Protection Network Against Reverse Battery 3.1.1 Solution 1: Resistor in the ground line (R The following is an indication on how to dimension the R ≤ 600mV / (I 1 ...
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... Calculation example: For 100V and I CCpeak 5kΩ ≤ R ≤ 180kΩ. prot Recommended values: R 16/22 ≤ prot OHµC IH GND IHmax ≥ 20mA; V ≥ 4.5V latchup OHµC =10kΩ, C =10nF. prot EXT VND5012AK-E if the device drives an GND line CC line line to prot ...
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... VND5012AK-E 4 Package and PCB Thermal Data 4.1 PowerSSO-24 Thermal Data Figure 25. PowerSSO-24 PC Board Layout condition of R PCB thickness=1.6mm, Cu thickness=70µm (front and back side), Copper areas: from minimum pad lay-out to 8cm Figure 26. R thj-amb Figure 27. PowerSSO-24 Thermal Impedance Junction Ambient Single Pulse Pulse Calculation Formula ⋅ ...
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... Figure 28. Thermal Fitting Model of a Single Channel HSD in PowerSSO-24 Thermal Parameter Area/island (cm R1 (°C/W) R2 (°C/W) R3 (°C/W) R4 (°C/W) R5 (°C/W) R6 (°C/W) R7 (°C/W) R8 (°C/W) C1 (W.s/°C) C2 (W.s/°C) C3 (W.s/°C) C4 (W.s/°C) C5 (W.s/°C) C6 (W.s/°C) C7 (W.s/°C) C8 (W.s/°C) 18/ Footprint 0.1 0 0.1 0.3 0.0025 0.0024 0.025 0.75 1 2.2 0.0025 0.0024 VND5012AK ...
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... VND5012AK-E 5 Package information In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second-level interconnect. The category of Second-Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ...
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... All dimensions are in mm. 20/22 Base Q.ty Bulk Q.ty Tube length (± 0. (± 0.1) All dimensions are in mm 1.55 1.5 11.5 2.85 2 End Top No components cover 500mm min tape VND5012AK-E 49 1225 532 3.5 13.8 0.6 REEL DIMENSIONS Base Q.ty 1000 Bulk Q.ty 1000 A (max) 330 B (min) 1.5 C (± -0) 24.4 N (min) ...
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... VND5012AK-E 6 Revision history Table 12. Document revision history Date 10-Apr-2006 Revision 1 Initial release. Revision history Changes 21/22 ...
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... Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 22/22 Please Read Carefully: © 2006 STMicroelectronics - All rights reserved STMicroelectronics group of companies www.st.com VND5012AK-E ...