ADRF6750 Analog Devices, Inc., ADRF6750 Datasheet - Page 9

• Manufacturer Part Number: ADRF6750
• Description: 950 Mhz To 1575 Mhz Quadrature Modulator With Integrated Fractional-n Pll And Vco
• Manufacturer: Analog Devices, Inc.

Pin No.
27
29
30
28
17
18
48
45
25, 26
22, 23
10, 8
44
43
Exposed Paddle
Mnemonic
CS
SDI/SDA
CLK/SCL
SDO
REFIN
REFIN
RFOUT
TXDIS
LOMONP,
LOMONN
TESTLO,
TESTLO
LF2, LF3
LDET
MUXOUT
EP
Description
Chip Select, CMOS Input. When CS is high, the data stored in the shift registers is loaded into one of
31 latches. In I
the slave address is 0x40.
Serial Data Input for SPI Port/Serial Data Input/Output for I
impedance CMOS data input, and data is loaded in an 8-bit word. In I
tional port.
Serial Clock Input for SPI/I
This input is a high impedance CMOS input.
Serial Data Output for SPI Port. Register states can be read back on the SDO data output line.
Reference Input. This high impedance CMOS input should be ac-coupled.
Reference Input Bar. This pin should be either grounded or ac-coupled to ground.
RF Output. Single-ended, 50 Ω, internally biased RF output. This pin must be ac-coupled to the
load. Nominal output power is −1.6 dBm for a single sideband baseband drive of 0.9 V p-p differ-
ential on the I and Q inputs (attenuation = minimum).
Output Disable. This pin can be used to disable the RF output. Connect to high logic level to disable
the output. Connect to low logic level for normal operation.
Differential Monitor Outputs. These pins provide a replica of the internal local oscillator frequency
(1× LO) at four different power levels: −6 dBm, −12 dBm, −18 dBm, and −24 dBm, approximately.
These open-collector outputs must be terminated with external resistors to REGOUT. These outputs
can be disabled through serial port programming and should be grounded if not used.
Differential Test Inputs. These inputs provide an option for an external 2× LO to drive the modulator.
This option can be selected by serial port programming. These inputs must be externally dc-biased and
should be grounded if not used.
No connect pins.
Lock Detect. This output pin indicates the state of the PLL: a high level indicates a locked condition,
whereas a low level indicates a loss of lock condition.
Muxout. This output is a test output for diagnostic use only. It should be left unconnected by the
customer.
Exposed Paddle. Connect to ground plane via a low impedance path.
2
C mode, when CS is high, the slave address of the device is 0x60, and when CS is low,
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2
C Port. This serial clock is used to clock in the serial data to the registers.
2
C Port. In SPI mode, this pin is a high
2
C mode, this pin is a bidirec-
ADRF6750