OM6211 NXP Semiconductors, OM6211 Datasheet - Page 6

• Manufacturer Part Number: OM6211
• Description: 48 X 84 Dot Matrix Lcd Driver
• Manufacturer: NXP Semiconductors

Philips Semiconductors
In order to reduce current consumption related to the
pull-up circuitry, the 5-bit number is stored in a register
when exiting the Power-down mode. The pull-up circuitry
is then disabled. Additionally, the register is refreshed by
each HVE command.
7.7
Serial data input.
7.8
Serial data output (3-state, push-pull). If bidirectional data
transmission is required, SDOUT and SDIN should be
connected externally. If the read mode is not used,
SDOUT should be left open-circuit.
7.9
Serial clock input.
7.10
Chip enable input, active LOW. If SCE is HIGH, the SCLK
pulses are ignored.
7.11
External clock input. The external clock is active only in a
special test mode, so in the application it is not available.
In normal mode (the internal on-chip oscillator used) this
input must be connected to V
internal oscillator is disabled.
7.12
Horizontal mirroring input. When MX = 1 the X address
space is mirrored.
7.13
LCD module identification inputs. Their state can be read
out via the serial interface in order to identify the module
version.
7.14
External reset pin. When LOW the chip will be reset as
defined in Section 9.1. The initialization by the RES pin is
always required during power-on. Timing for the RES pin
is illustrated in Fig.18.
7.15
Test pins. In the application T4 and T5 must be connected
to V
a pull-down resistor).
2002 Jan 17
48
SS
. T1, T2, T3 and T6 must be left open-circuit (T6 has
SDIN: serial data input
SDOUT: serial data output
SCLK: serial clock input
SCE: chip enable
OSC: oscillator
MX: horizontal mirroring
ID3 and ID4: identification inputs
RES: reset
T1, T2, T3, T4, T5 and T6: test pins
84 dot matrix LCD driver
SS
. If OSC is held HIGH, the
6
8
8.1
The on-chip oscillator provides the clock signal for the
display system. It has no external components.
8.2
Detects the serial interface protocol, commands and
display data bytes. The serial interface converts the data
input (serial-to-parallel) as well as the output bits.
8.3
Decodes all commands.
8.4
The OM6211 contains a 48
stores the display data. The RAM is divided into six banks
of 84 bytes (6
transferred to the RAM via the serial interface. There is a
direct correspondence between the X address and column
output number.
8.5
The timing generator produces the various signals
required to drive the internal circuitry. Internal chip
operation is not disturbed by operations of the serial
interface.
8.6
The address counter assigns addresses to the display
data RAM for writing. The X address (X
Y address (Y
operation the address counter is automatically
incremented by 1.
8.7
The display is generated by continuously shifting rows of
RAM data to the dot matrix LCD via the column outputs.
The display status (all dots on/off, normal/inverse video) is
set via the serial interface.
8.8
A voltage multiplier (charge pump) with a programmable
number of stages. Internal capacitors are used for the
voltage multiplier, therefore only decoupling capacitors for
V
LCD
BLOCK DIAGRAM FUNCTIONS
and V
Oscillator
Serial interface control
Command decoder
Display Data RAM (DDRAM)
Timing generator
Address Counter (AC)
Display address counter
V
LCD
DD2
generator
2
to Y
are required.
8
0
) are set separately. After a write
84 bits). During RAM access, data is
84 bit static RAM which
Product specification
6
to X
OM6211
0
) and the