STPIC44L02 STMicroelectronics, STPIC44L02 Datasheet - Page 13

• Manufacturer Part Number: STPIC44L02
• Description: 4 CHANNEL SERIAL AND PARALLEL LOW SIDE PRE-FET DRIVER
• Manufacturer: STMicroelectronics

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The STPIC44L02 monitors the drain voltage of
each channel to detect shorted load conditions.
The onboard deglitch timer starts running when
the gate output to the power FET transitates from
the off state to the on state. The timer provides a
60 s deglitch time, t
voltage to stabilize after the power FET has been
turned on (see figure 16 and 17).
The deglitch delay time is only enabled for the first
60 s after the FET has been turned on. After the
deglitch delay time, the drain voltage is checked to
verify that it is less than the fault reference
voltage. When it is greater than the reference
voltage for at least the short to battery deglitch
time, t
fault
automatically shut off until the error condition has
been corrected.
An overheating condition on the FET occurs when
the controller continually tries to reenable the
output under shorted load fault conditions. When a
Figure 14 : Open Load Test Circuit
(STBDG)
condition
FLT flags the microcontroller that a
exists
(STBFM)
and
, to allow the drain
gate
output
is
shorted load fault is detected, the gate output is
transitated into a low duty cycle PWM signal to
protect the FET from overheating. The PWM rate
is defined as t
as t
the fault has been corrected or until the controller
disables the gate output.
The microcontroller can read the serial port on the
predriver to isolate the channel that reported the
fault condition.
Fault bits 0-3 distinguish faults for each of the
output channels. When a shorted load occurs, the
STPIC44L02 automatically retries the output and
the fault clears after the fault condition has been
corrected. Figure 16 illustrates operation after a
gate output has been turned on. The gate to the
power FET is turned on and the deglitch timer
starts running. Under normal operation, T1 turns
on and the drain operates below the reference
point set at U1. The output of U1 is low and a fault
condition is not flagged.
W
. The gate output remains in this state until
(SB)
and the pulse width is defined
STPIC44L02
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