MB15E07SL Fujitsu Media Devices, MB15E07SL Datasheet - Page 10

• Manufacturer Part Number: MB15E07SL
• Description: Single Serial Input PLL Frequency Synthesizer On-Chip 2.5 GHz Prescaler
• Manufacturer: Fujitsu Media Devices

10
MB15E07SL
Table 4. Binary 7-bit Swallow Counter Data Setting
Table 5. Prescaler Data Setting
Table 6. Charge Pump Current Setting
Table 7. LD/fout Output Select Data Setting
(2) Relation between the FC Input and Phase Characteristics
The FC bit changes the phase characteristics of the phase comparator. Both the internal charge pump output level
(D
output is controlled by the FC bit. The relationship between the FC bit and each of D
Table 8. FC Bit Data Setting (LDS =
* : High impedance
O
) and the phase comparator output ( R, P) are reversed according to the FC bit. Also, the monitor pin (f
fr > f
fr < f
fr = f
LDS
Divide
SW
CS
ratio
H
H
H
L
L
L
127
(A)
P
P
P
0
1
fout signal
LD signal
D
Z*
H
L
O
A
7
0
0
1
A
6
0
0
1
LD/
Prescaler divide ratio
H
L
L
R
f
FC = High
OUT
Current value
A
5
0
0
1
output signal
6.0 mA
1.5 mA
32/33
64/65
A
4
0
0
1
“H”)
Z*
Z*
L
P
A
3
0
0
1
fout = fr
LD/fout
A
2
0
0
1
A
1
0
1
1
D
Z*
H
L
O
H
L
L
R
FC = Low
O
, R, and P is shown below.
Z*
Z*
L
P
fout = fp
LD/fout
OUT
)