ACS8509 Semtech Corporation, ACS8509 Datasheet - Page 14

• Manufacturer Part Number: ACS8509
• Description: Synchronous Equipment Timing Source for Sonet or SDH Network Elements
• Manufacturer: Semtech Corporation

Table 10 Output Reference Source Selection Table
Note...1.544 MHz/2.048 MHz are shown for SONET/SDH respectively. Pin SONSDHB controls default, when High SONET is default.
Table 11 Multiple E1/DS1 Outputs in Relation to Standard Outputs
increases latency, wander may often only need to be
removed at specific points within a network where buffer
stores are acceptable, such as at digital cross connects.
Otherwise, wander is sometimes not required to be
attenuated and can be passed through transparently. The
ACS8509 has programmable wander transfer
characteristics in a range from 0.1 Hz to 20 Hz. The
wander and jitter transfer characteristic is shown in
Figure 5.
Wander on the local oscillator clock will not have
significant effect on the output clock whilst in Locked
mode, so long as the DPLL bandwidth is set high enough
so that the DPLL can compensate quickly enough for any
frequency changes in the crystal. In Free-run or Holdover
mode wander on the crystal is more significant. Variation
in crystal temperature or supply voltage both cause drifts
in operating frequency, as does ageing. These effects
Revision 2.00/January 2006 © Semtech Corp.
ADVANCED COMMUNICATIONS
O1
O2
O3
O4
FrSync
MFrSync
Default 77.76
n value
n x E1
n x T1
Frequencies Available by Output
Mode
Name
Port
32.768 4
24.704 4
Freq to
APLL
PECL/LVDS
(PECL default)
TTL/CMOS
TTL/CMOS
TTL/CMOS
TTL/CMOS
TTL/CMOS
Output Port
Technology
Multiplier
4
APLL
19.44 MHz (default), 51.84 MHz, 77.76 MHz, 155.52 MHz
1.544 MHz/2.048 MHz, 3.088 MHz/4.096 MHz, 6.176 MHz/8.192 MHz, 6.48 MHz (default), 12.352
MHz/16.384 MHz, 19.44 MHz, 25.92 MHz
19.44 MHz - fixed
1.544 MHz/2.048 MHz
FrSync, 8 kHz - with a 50:50 MSR
MFrSync, 2 kHz - with a 50:50 MSR
311.04
131.072 131.072 65.536 32.768
98.816
APLL
Freq
311.04
98.816
clk_ filt
155.52 77.76
49.408 24.704
filt/2
clk_
16
filt/4
clk_
FINAL
Page 14
O1
must be limited by careful selection of a suitable
component for the local oscillator, as specified in the
Section “Local Oscillator Clock” on page 8.
Phase Variation
There will be a phase shift across the ACS8509 between
the selected input reference source and the output clock.
This phase shift may vary over time but will be constrained
to lie within specified limits. The phase shift is
characterized using two parameters, MTIE (Maximum
Time Interval Error), and TDEV (Time Deviation), which,
although being specified in all relevant specifications,
differ in acceptable limits in each one. Typical
measurements for the ACS8509 are shown in Figures 6
and 7, for Locked mode operation. Figure 8 shows a
typical measurement of Phase Error accumulation in
Holdover mode operation.
51.84
21.84533
16.46933
Frequencies Supported
clk_ filt/6
38.88
8
16.384
12.352
filt/8
clk_
25.92
10.92267
8.234667
filt/12
clk_
ACS8509 SETS
19.44
4
8.192
6.176
filt/16
clk_
O2
O3
O1
6.48
2.730667 77.76
2.058667 77.76
DATASHEET
www.semtech.com
filt/48
clk_
77.76
DPLL
Freq