MD1050-DCC M-Systems Inc., MD1050-DCC Datasheet - Page 14

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MD1050-DCC

Manufacturer Part Number
MD1050-DCC
Description
Diskonchip Ide Pro Data Sheet
Manufacturer
M-Systems Inc.
Datasheet
4.5
The content of this register depends on the selected mode of address translation: CHS (Cylinder,
Head, Sector) or LBA (Logical Block Address) mode. In CHS mode (LBA=0 in Device/Head
register), this register contains the subsequent command’s starting sector number, which can be
from 1 to the maximum number of sectors per track. In LBA mode (LBA=1 in Device/Head
register), this register contains LBA bits 0-7, which are updated upon command completion. This
register is write-only when BSY=0 and DRQ=0.
4.6
The contents of this register depend on the value of LBA bits 8-15 in the Device/Head register. If
LBA=0, this register contains the 8 least significant bits of the starting cylinder address (CL bits 0-
7). If LBA=1, this register contains LBA bits 8-15. This register is write-only when BSY=0 and
DRQ=0.
13
Bit No.
Bit No.
LBA15
LBA7
0-7
0-7
0-7
0-7
Bit 7
SN7
Bit 7
CL7
Sector Number Register (LBA 0-7) (Read/Write)
Cylinder Low Register (LBA 8-15) (Read/Write)
CL[0:7] (Cylinder Low Bits 0-7)
LBA[8:15] (Logical Block Addresses 8-15)
SN[0:7] (Sector Numbers 0-7)
LBA[0:7] (Logical Block Addresses 0-7)
LBA14
LBA6
Bit 6
Bit 6
SN6
CL6
LBA13
LBA5
Bit 5
Bit 5
SN5
CL5
DiskOnChip IDE Pro Data Sheet, Rev. 1.5
LBA12
LBA5
Bit 4
Bit 4
SN4
CL4
CHS Mode
CHS Mode
CHS Mode
CHS Mode
LBA Mode
LBA Mode
LBA Mode
LBA Mode
Description
Description
LBA11
LBA3
Bit 3
Bit 3
SN3
CL3
LBA10
LBA2
Bit 2
Bit 2
SN2
CL2
LBA1
LBA9
Bit 1
Bit 1
SN1
CL1
91-SR-012-01-8L
LBA8
LBA0
Bit 0
Bit 0
SN0
CL0

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