AD9957 Analog Devices, AD9957 Datasheet - Page 2
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AD9957
Manufacturer Part Number
AD9957
Description
1 GSPS Quadrature Digital Upconverter
Manufacturer
Analog Devices
Datasheet
1.AD9957.pdf
(38 pages)
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DataSheet
AD9957
Electrical Specifications ..................................... 3
Absolute Maximum Ratings ............................... 6
Pin Configuration ............................................... 7
Pin Description.................................................... 8
Modes of Operation........................................... 10
REFCLK Input.................................................. 19
REVISION HISTORY
Revision PrA (5/25/05): Initial Version of Preliminary Datasheet
Revision PrB (9/30/05): Register map, pinout, pin description added
Revision PrC (12/06/05): Register map completed, pinout updated.
Revision PrD (2/27/06) Further progress
Revision PrE (3/31/06) Incorporated Marketing review comments
Quadrature Modulation Mode ........................... 10
BlackFin Interface Mode .................................... 10
Signal Processing (QDUC & BFI modes) ...........11
Interpolating DAC Mode .................................... 16
Single-Tone Mode ................................................ 17
REFCLK PLL...................................................... 19
REFCLK PLL with Crystal................................ 19
4
PDCLK Pin ................................................................ 11
TxEnable Pin .............................................................. 11
Input Data Assembler ................................................. 12
Inverse CCI Filter....................................................... 13
Fixed interpolator (4x)................................................ 13
Programmable Interpolating Filter ............................. 14
Quadrature Modulator ................................................ 15
DDS Core ................................................................... 15
Inverse SINC Filter .................................................... 15
Output Scale Factor (OSF) ......................................... 15
14-Bit DAC ................................................................ 15
Auxiliary DAC ........................................................... 16
Amplitude Scale Factor (ASF) ................................... 17
I/O_UPDATE Pin....................................................... 17
U
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TABLE OF CONTENTS
Rev. PrF | Page 2 of 38
Serial Programming.......................................... 21
Register Map and Descriptions......................... 24
REFCLK: External Interface..............................19
Control Interface—Serial I/O..............................21
General Operation of the Serial Interface..........21
Instruction Byte ....................................................22
Serial Interface Port Pin Description..................22
MSB/LSB Transfers .............................................22
RAM IO via Serial Port .......................................23
RAm control Modes .............................................23
BAseband input scaling with RAM.....................23
I and q input data from ram................................23
REGISTER MAP .................................................24
REGISTER DESCRIPTIONS ............................32
Control Function Register #1 (CFR1) ........................32
Control Function Register #2 (CFR2) ........................33
Control Function Register #3 (CFR3) ........................35
Auxilliary DAC Control Register ...............................36
IO Update Rate Register.............................................36
QDUC RAM Segment Registers (QRSR0, QRSR1)..36
Frequency Tuning Word Register (FTW) ...................36
Phase Offset Word Register (POW)............................36
Amplitude Scale Factor (ASF) ...................................36
QDUC Profile X Register (QDUC-PXR)/..................36
Single Tone Profile X Register (ST-PXR) ..................36
QRSRX<47:32> RAM Segment Address Ramp Rate
................................................................................36
PRELIMINARY TECHNICAL DATA