ADP3050-3.3 Analog Devices, ADP3050-3.3 Datasheet - Page 7

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ADP3050-3.3

Manufacturer Part Number
ADP3050-3.3
Description
200 Khz, 1 a Step-down High-voltage Switching Regulator
Manufacturer
Analog Devices
Datasheet
THEORY OF OPERATION
The ADP3050 is a fixed-frequency, current-mode buck regulator.
Current mode systems provide excellent transient response, and
are much easier to compensate than voltage-mode systems. (Refer
to the functional block diagram.) At the beginning of each clock
cycle, the oscillator sets the latch, turning on the power switch.
The signal at the noninverting input of the comparator is a replica
of the switch current (summed with the oscillator ramp). When
this signal reaches the appropriate level set by the output of the
error amplifier, the comparator resets the latch and turns off the
power switch. In this manner, the error amplifier sets the correct
current trip level to keep the output in regulation. If the error
amplifier output increases, more current is delivered to the
output; if it decreases, less current is delivered to the output.
The current sense amplifier provides a signal proportional to
switch current to both the comparator and to a cycle-by-cycle
current limit. If the current limit is exceeded, the latch will be
reset, turning the switch off until the beginning of the next clock
cycle. The ADP3050 has a foldback current limit that reduces
the switching frequency under fault conditions to reduce stress
to the IC and to the external components.
Most of the control circuitry is biased from the 2.5 V internal
regulator. When the BIAS pin is left open, or when the voltage
at this pin is less than 2.7 V, all of the operating current for the
1,500
1,450
1,400
1,350
1,300
1,250
1,200
1,150
1,100
1,050
1,000
0A
0V
45
V
V
R
L = 33 H COILTRONICS
UP2B-330
C
C
V
IN
OUT
LOAD
IN
OUT
IN
35
= 10V
= 22 F
= 10V, NO LOAD
= 5V
= 100 F
= 19
25
15
I
L
= 500mA/DIV
5
TEMPERATURE – C
TIME – 100 s/DIV
5
V
15
OUT
25
= 1V/DIV
35
45
55
65
75
85
ADP3050 is drawn from the input supply. When the BIAS pin
is above 2.7 V, the majority of the operating current is then
drawn from this pin (usually tied to the regulator's low-voltage
output) instead of from the higher-voltage input supply. This
can provide substantial efficiency improvements at light-load
conditions, especially for systems where the input voltage is
much higher than the output voltage.
The ADP3050 uses a special drive stage that allows the power
switch to saturate. An external diode and capacitor provide a
boosted voltage to the drive stage that is higher than the input
supply voltage. Overall efficiency is dramatically improved by
using this type of saturating drive stage.
Pulling the SD pin below 0.4 V puts the device in a low-power
mode, shutting off all internal circuitry and reducing the supply
current to under 20 µA.
Setting the Output Voltage
The output of the adjustable version (ADP3050AR) can be set
to any voltage between 1.25 V and 12 V by connecting a resistor
divider to the FB pin as shown in Figure 2.
V
1N5818
IN
57.6
48.0
38.4
28.8
19.2
19.2
28.8
38.4
9.6
9.6
12V
0
D1
0
33 H
L1
+
C1
22 F
100
C3
220nF
1N914
R
D2
2
=
R
FREQUENCY – Hz
1k
1
×
1
2
3
4
V
NO LOAD
ADP3050-3.3
SWITCH
BOOST
BIAS
FB
1 2
OUT
.
10k
U1
COMP
1
GND
SD
IN
100k
ADP3050
8
7
6
5
4k
R1
+ C4
100 F
C2
1nF
3.3V
1M
220
200
180
160
140
120
100
80
60
40
20
V
OUT
(1)

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