HFC-S+ Cologne Chip AG, HFC-S+ Datasheet - Page 22
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HFC-S+
Manufacturer Part Number
HFC-S+
Description
Isdn S/t HDLC Basic Rate Controller
Manufacturer
Cologne Chip AG
Datasheet
1.HFC-S.pdf
(70 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HFC-S+HFC-S PCIA
Manufacturer:
COLOGINE
Quantity:
381
863C
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*
FIFO change, FIFO reset and F1/F2 incrementation
Changing the FIFO, reseting the FIFO or incrementing the frame counters causes a short BUSY
period of the HFC-S+. This means an access to FIFO control registers is NOT allowed until BUSY
status is reset (bit 0 of STATUS register). This has a maximum duration of 25 clock cycles (2µs).
Status, interrupt and control registers can be read and written at any time.
important!
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Cologne
Chip