WM8253SCDS/V Wolfson Microelectronics Ltd., WM8253SCDS/V Datasheet - Page 11

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WM8253SCDS/V

Manufacturer Part Number
WM8253SCDS/V
Description
Specifications: Manufacturer: Wolfson Microelectronics ; Product Category: ADC (A/D Converters) ; RoHS:  Details ; Number of Converters: 1 ; Number of ADC Inputs: 1 ; Conversion Rate: 6 MSPs ; Resolution: 16 bit ; Input Type: Voltage ; Interface
Manufacturer
Wolfson Microelectronics Ltd.
Datasheet

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WM8253SCDS/V
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WM8253
Figure 4 Reset Level Clamping and CDS Circuitry
w
EXTERNAL VRLC
C
IN
VRLC/
VBIAS
VINP
Reset Level Clamping is controlled by register bit RLCINT. Figure 5 illustrates the effect of the
RLCINT bit for a typical CCD waveform, with CL applied during the reset period.
The RLCINT register bit is sampled on the positive edge of MCLK that occurs during each VSMP
pulse. The sampled level, high (or low) controls the presence (or absence) of the internal CL pulse on
the next reset level. The position of CL can be adjusted by using control bits CDSREF[1:0] (Figure 6).
Figure 5 Relationship of RLCINT, MCLK and VSMP to Internal Clamp Pulse, CL
The VRLC/VBIAS pin can be driven internally by a 4-bit DAC (RLCDAC) by writing to control bits
RLCV[3:0]. The RLCDAC range and step size may be increased by writing to control bit
RLCDACRNG. Alternatively, the VRLC/VBIAS pin can be driven externally by writing to control bit
VRLCEXT to disable the RLCDAC and then applying a d.c. voltage to the pin.
1
CL
RLC
2
MCLK
VRLCEXT
TIMING CONTROL
RLC DAC
4-BIT
S/H
R
S
CDS
VSMP
CDS
S/H
V
S
INPUT SAMPLING
BLOCK
+
-
+
FROM CONTROL
INTERFACE
TO OFFSET DAC
FROM CONTROL
INTERFACE
PD, Rev 4.1, August 2011
Production Data
11

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