AT91FR40161 ATMEL Corporation, AT91FR40161 Datasheet - Page 87
AT91FR40161
Manufacturer Part Number
AT91FR40161
Description
The AT91FR40161 Features 136 K Bytes of On-chip SRAM, 2M Bytes of Flash, an External Bus Interface, a 3-channel Timer/Counter, 2 ...
Manufacturer
ATMEL Corporation
Datasheet
1.AT91FR40161.pdf
(153 pages)
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PIO Interrupt Enable Register
Register Name: PIO_IER
Access Type:
Offset:
This register is used to enable PIO interrupts on the corresponding pin. It has effect whether PIO is enabled or not.
1 = Enables an interrupt when a change of logic level is detected on the corresponding pin.
0 = No effect.
PIO Interrupt Disable Register
Register Name: PIO_IDR
Access Type:
Offset:
This register is used to disable PIO interrupts on the corresponding pin. It has effect whether the PIO is enabled or not.
1 = Disables the interrupt on the corresponding pin. Logic level changes are still detected.
0 = No effect.
1354D–ATARM–08/02
P31
P23
P15
P31
P23
P15
P7
P7
31
23
15
31
23
15
7
7
Write Only
0x40
Write Only
0x44
P30
P22
P14
P30
P22
P14
30
22
14
P6
30
22
14
P6
6
6
P29
P21
P13
P29
P21
P13
P5
P5
29
21
13
29
21
13
5
5
P28
P20
P12
P28
P20
P12
P4
P4
28
20
12
28
20
12
4
4
P27
P19
P11
P27
P19
P11
P3
P3
27
19
27
19
11
11
3
3
P26
P18
P10
P26
P18
P10
26
18
10
P2
26
18
10
P2
2
2
AT91X40 Series
P25
P17
P25
P17
P9
P1
P9
P1
25
17
25
17
9
1
9
1
P24
P16
P24
P16
P8
P0
P8
P0
24
16
24
16
8
0
8
0
87
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