AT94K ATMEL Corporation, AT94K Datasheet - Page 151

• Manufacturer Part Number: AT94K
• Description: 5K - 40K Gates of At40k FPGA with 8-bit Microcontroller, up to 36K Bytes of SRAM and On-chip JTAG ICE
• Manufacturer: ATMEL Corporation

Alternate I/O
Functions of PortE
PortE Schematics
Rev. 1138F–FPSLI–06/02
PortE may also be used for various Timer/Counter functions, such as External Input Clocks
(TC0 and TC1), Input Capture (TC1), Pulse Width Modulation (TC0, TC1 and TC2), and tog-
gling upon an Output Compare (TC0, TC1 and TC2). For a detailed pinout description, consult
Table 46 on page 149. For more information on the function of each pin, See “Timer/Counters”
on page 85.
Note that all port pins are synchronized. The synchronization latches are, however, not shown
in the figures.
Figure 76. PortE Schematic Diagram (Pin PE0)
PE0
TX0
PULL-UP
PULL-UP
MOS
MOS
RESET
DL
RESET
TX0D
DL
GTS
GTS
RP
0
1
DL
DL
TX0D
T0
AT94K Series FPSLIC
TX0ENABLE
SCR(52)
TX0ENABLE
SCR(52)
GTS: Global Tri-state
DL: Configuration Download
WL: Write PORTE
WD: Write DDRE
RL: Read PORTE Latch
RD: Read DDRE
RP: Read PORTE Pin
TX0D: UART 0 Transmit Data
TX0ENABLE: UART 0 Transmit Enable
SCR: System Control Register
T0: Timer/Counter0 Clock
Q
Q
PORTE0
RESET
RESET
DDE0
WD
WL
RD
RL
R
R
D
D
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