AT94K ATMEL Corporation, AT94K Datasheet - Page 90

• Manufacturer Part Number: AT94K
• Description: 5K - 40K Gates of At40k FPGA with 8-bit Microcontroller, up to 36K Bytes of SRAM and On-chip JTAG ICE
• Manufacturer: ATMEL Corporation

90
AT94K Series FPSLIC
Table 23. Clock 2 Prescale Select
The Stop condition provides a Timer Enable/Disable function. The prescaled modes are
scaled directly from the CK oscillator clock for Timer/Counter0 and PCK2 for Timer/Counter2.
If the external pin modes are used for Timer/Counter0, transitions on PE0/(T0) will clock the
counter even if the pin is configured as an output. This feature can give the user SW control of
the counting.
Timer Counter0 – TCNT0
Timer/Counter2 – TCNT2
These 8-bit registers contain the value of the Timer/Counters.
Both Timer/Counters are realized as up or up/down (in PWM mode) counters with read and
write access. If the Timer/Counter is written to and a clock source is selected, it continues
counting in the timer clock cycle following the write operation.
Timer/Counter0 Output Compare Register – OCR0
Timer/Counter2 Output Compare Register – OCR2
Bit
$32 ($52)
Read/Write
Initial Value
Bit
$23 ($43)
Read/Write
Initial Value
Bit
$31 ($51)
Read/Write
Initial Value
Bit
$22 ($42)
Read/Write
Initial Value
CS22
0
0
0
0
1
1
1
1
CS21
7
MSB
R/W
0
7
MSB
R/W
0
7
MSB
R/W
0
7
MSB
R/W
0
0
0
1
1
0
0
1
1
6
R/W
0
6
R/W
0
6
R/W
0
6
R/W
0
CS20
0
1
0
1
0
1
0
1
5
R/W
0
5
R/W
0
5
R/W
0
5
R/W
0
Description
Stop, the Timer/Counter2 is stopped
PCK2
PCK2/8
PCK2/32
PCK2/64
PCK2/128
PCK2/256
PCK2/1024
4
R/W
0
4
R/W
0
4
R/W
0
4
R/W
0
3
R/W
0
3
R/W
0
3
R/W
0
3
R/W
0
2
R/W
0
2
R/W
0
2
R/W
0
2
R/W
0
1
R/W
0
1
R/W
0
1
R/W
0
1
R/W
0
Rev. 1138F–FPSLI–06/02
0
LSB
R/W
0
0
LSB
R/W
0
0
LSB
R/W
0
0
LSB
R/W
0
TCNT0
TCNT2
OCR0
OCR2