AT94K ATMEL Corporation, AT94K Datasheet - Page 70

• Manufacturer Part Number: AT94K
• Description: 5K - 40K Gates of At40k FPGA with 8-bit Microcontroller, up to 36K Bytes of SRAM and On-chip JTAG ICE
• Manufacturer: ATMEL Corporation

TAP Controller
70
AT94K Series FPSLIC
Figure 40. TAP Controller State Diagram
The TAP controller is a 16-state finite state machine that controls the operation of the Bound-
ary-Scan circuitry and On-Chip Debug system. The state transitions depicted in Figure 40
depend on the signal present on TMS (shown adjacent to each state transition) at the time of
the rising edge at TCK. The initial state after a Power-On Reset is Test-Logic-Reset.
As a definition in this document, the LSB is shifted in and out first for all shift registers.
1
0
Test-Logic-Reset
Run-Test/Idle
0
1
1
0
Select-DR Scan
Capture-DR
Update-DR
Pause-DR
Exit1-DR
Exit2-DR
Shift-DR
1
0
0
1
0
1
1
0
1
1
0
0
1
0
Select-IR Scan
Capture-IR
Update-IR
Pause-IR
Exit1-IR
Exit2-IR
Shift-IR
1
Rev. 1138F–FPSLI–06/02
0
0
1
0
1
1
0
1
1
0
0