datasheet. Catalyst Semiconductor, datasheet. Datasheet - Page 4

• Manufacturer Part Number: datasheet.
• Description: CAT24WC32
• Manufacturer: Catalyst Semiconductor

The CAT24FC01 supports the I
protocol. This Inter-Integrated Circuit Bus protocol defines
any device that sends data to the bus to be a transmitter
and any device receiving data to be a receiver. Data
transfer is controlled by the Master device which
generates the serial clock and all START and STOP
conditions for bus access. The CAT24FC01 operates as
a Slave device. Both the Master and Slave devices can
operate as either transmitter or receiver, but the Master
device controls which mode is activated. A maximum of
8 devices may be connected to the bus as determined by
the device address inputs A0, A1, and A2.
The CAT24FC01 serial clock input pin is used to clock all
data transfers into or out of the device. This is an input pin.
Doc. No. 1073, Rev. D
SDA OUT
SDA IN
Serial Clock
SCL
SCL
SDA
t SU:STA
SDA
SCL
t F
8TH BIT
BYTE n
2
START BIT
C Bus data transmission
t HD:STA
t LOW
t AA
ACK
t HD:DAT
t HIGH
t LOW
STOP
CONDITION
4
The CAT24FC01 bidirectional serial data/address pin is
used to transfer data into and out of the device. The SDA
pin is an open drain output and can be wire-ORed with
other open drain or open collector outputs.
These inputs set device address when cascading multiple
devices. A maximum of eight devices can be cascaded
when using the device.
This input, when tied to GND, allows write operations to
the entire memory. For CAT24FC01 when this pin is tied
to V
When left floating, memory is unprotected.
t DH
CC
t SU:DAT
Write Protect
Serial Data/Address
t R
, the entire array of memory is write protected.
t WR
Device Address Inputs
STOP BIT
START
CONDITION
t SU:STO
t BUF
ADDRESS