AD1986 Analog Devices, AD1986 Datasheet - Page 45

• Manufacturer Part Number: AD1986
• Manufacturer: Analog Devices

Register
IV
(Information
Valid Bit)
DL [4:0]
(Buffer
Delays,
Read/Write)
INV
(Inversion
Bit,
Read/Write,
CODEC
Default)
G [4:0]
(Gain Bits
(Read/Write))
Preliminary Technical Data
Function
Indicates whether a sensing method is provided by the CODEC and if information field is valid. This field is updated by the
CODEC.
IV
0
1
A number representing a delay measurement for the input and output channels. The default value is the delay internal to
the CODEC. The BIOS may add to this value the known delays external to the CODEC, such as for an external amplifier, logic,
etc. Software will use this value to accurately calculate audio stream position with respect to what is been reproduced or
recorded. These values are in 20.83 microsecond (1/48000 second) units. For output channels, this timing is from the end of
AC link frame in which the sample is provided, until the time the analog signal appears at the output pin. For input streams,
this is from when the analog signal is presented at the pin until the representative sample is provided on the AC link. Analog
to analog paths are not considered in this measurement. The measurement is a typical measurement, at a 48 KHz sample
rate, with minimal in-CODEC processing (i.e., 3D effects are turned off.) An example of an audio output delay is filter group
delay and FIFO or other sample buffers in the path. So when an audio PCM sample is written to the CODEC in an AC ’97
frame it will be delayed before the output pin is updated to that value.
DL [4:0]
0x00
0x01-0x1E
0x1F
Indicates that the CODEC presents a 180 degree phase shift to the signal. This bit is only reset by a power-on reset, since it is
typically written by the system BIOS and is not reset by CODEC hard or soft resets as long as power remains applied to the
CODEC.
INV
0
1
The CODEC updates these bits with the gain value (dB relative to level-out) in 1.5 dBV increments, not including the volume
control gains. For example, if the volume gain is to 0 dB, then the output pin should be at the 0 dB level. Any difference in
the gain is reflected here. When relevant, the BIOS updates this bit to take into consideration external amplifiers or other
external logic that it knows about. G [3:0] indicates the magnitude of the gain. G [4] indicates whether the value is a gain or
attenuation—essentially it is a sign bit. These bits are only reset by a power-on reset as they are typically written by the
system BIOS and are not reset by CODEC hard or soft resets as long as power remains applied to the CODEC.
G4
0
0
1
x
Function
After CODEC reset de-assertion, it indicates the CODEC does NOT provide sensing logic and this bit will be
Read-Only. After a sense cycle is completed indicates that no information is provided on the sensing method.
After CODEC reset de-assertion, it indicates the CODEC provides sensing logic for this I/O and this bit is
Read/Write. After clearing this bit by writing 1, when a sense cycle is completed indicates that there is valid
information in the remaining descriptor bits. Writing 0 to this bit has no effect.
Function
Information not provided
Buffer delay: 20.83 µs per unit
Reserved
Function
No phase shift
Signal is shifted by 180° from the source signal
G [3:0]
0000
0001
...
1111
0001
...
1111
Reserved
Rev. 0 | Page 45 of 52
Gain/Attenuation (dB Relative to Level-Out)
0 dB
+1.5 dB
+1.5 dB × G [3:0]
+24.0 dB
−1.5 dB
−1.5 dB × G [3:0]
−24.0 dB
Default: 0
AD1986