W90220F Winbond Electronics Corp America, W90220F Datasheet - Page 29

• Manufacturer Part Number: W90220F
• Description: Pa-risc Embedded Controller
• Manufacturer: Winbond Electronics Corp America

The above information is the exclusive intellectual property of Winbond Electroncs Corp. and shall not be dsiclosed or distributed or reproduced without permission from
Winbond.
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Bits 0-2 Wait states of ROM Read cycle
Bits 3
Bits 4
RAM Base Address Register ( )
Index : 0x20,0x22,0x24, 0x26
Index : 0x21,0x23,0x25,0x27
0
Only ROM read cycles have a programmable wait states, while Flash ROM write cycles are
always 9-wait states.
The AC timing of the ROM read/write cycles with different wait states are shown in AC timing
specification.
ROM Bank 0 Only
When this bit is set, all ROM cycles will be directed to bank 0 despite of the programming value
of Base, ROMconf0 and ROMconf1 registers.
Logic Analyzer Mode Enable
This mode is used for chip's testing and debugging. When this bit is set, some of the DMA pins
are used to echo internal 486 bus' control/status signals.
DACK0 echos
DACK1 echos
CS0
CS1
ROMconf2[0:2]
1
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
echos
echos
RAM base address bit 0-7 (most significant bits)
ADS#;
MIO#
DC#;
WR#;
2
Wait States
3
2
3
4
5
6
7
8
9
IOR
IOW
TC0
TC1
Read/Write
Read/Write
4
echos
echos
echos
echos
BLAST#;
BRDY#
RDY#;
HLDA
5
Power-on Default : --
Power-on Default : --
6
7
W90220F
Version 0.84