W90221X Winbond Electronics Corp America, W90221X Datasheet - Page 20

• Manufacturer Part Number: W90221X
• Description: Pa-risc Embedded Controller
• Manufacturer: Winbond Electronics Corp America

5.5 GPIO
5.5.1 Overview
The W90221X provides totally 19 GPIO pins. These pins may serves as traditional PIO, or
parallel port interface, or another 2 PCI bus master request/grant, depend on what bit[4:5] of
port 0xf000003e are set. Right after power-on reset, all these pins are hi-Z (input mode).
5.5.2 Block Diagram
Figure 5.5.2 Block diagram of GPIO.
5.5.3 Features
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5.5.4 Related Pins
W90221X version 0.6
Each PIO port can generate a separate positive and negative edge interrupt.
Each PIO port consists of a bi-directional buffer connected to the appropriate W90221X
pin.
The input buffer is routed directly to a de-bounce circuit.
The de-bounce circuit performs a two TCLK_BUN clocks de-bounce of the input signal.
Programmable de-bounce circuit sampling clocks (TCLK_BUN), the clock range is TCLK ~
TCLK/128.
This pin serves as another "external interrupt request". Set this signal to logic 1 will also
set EIER[13] to logic 1. (The other 16-bit IDE slot can also use this pin as its interrupt
request).
# of GPIO
GPIO[0:7]
GPIO[8]
CONTROL FROM CPU
PIO[0:7] (io)
PIO[8] (io)
cfg = 00
PODATA
CLKREG
PIMASK
Table 5.4-1 : GPIO definitions
PIDATA
POEN
PINT
DEBOUNCE
PIO[0:7] (io)
PIO[8] (io)
Interrupt
module
cfg = 01
IN
OUT
TO Interrupt module
EN
ED[0:7] (io)
IO pin
nInit (out)
cfg = 1x
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