XC9500XV Xilinx Corp., XC9500XV Datasheet - Page 10
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XC9500XV
Manufacturer Part Number
XC9500XV
Description
XC9500XV 2.5 V CPLD Family
Manufacturer
Xilinx Corp.
Datasheet
1.XC9500XV.pdf
(18 pages)
XC9500XV Family High-Performance CPLD
I/O Block
The I/O Block (IOB) interfaces between the internal logic
and the device user I/O pins. Each IOB includes an input
buffer, output driver, output enable selection multiplexer,
10
Macrocell
(Inversion in
AND-array)
I/O/GTS3
I/O/GTS1
I/O/GTS2
I/O/GTS4
Product Term OE
To Fast CONNECT II
Switch Matrix
Figure 10: I/O Block and Output Enable Capability
Global OE 4
Global OE 3
Global OE 1
Global OE 2
PTOE
OUT
www.xilinx.com
1-800-255-7778
and user programmable ground control. See
details.
Macrocells
To other
1
0
Available in XC95144XV
and XC95288XV
Slew Rate
Control
Programmable
Preliminary Product Specification
Ground
User-
Bus-Hold
DS049 (v2.1) June 24, 2002
I/O Block
DS049_10_041400
I/O
Figure 10
for
R