MT93L04 Zarlink Semiconductor, MT93L04 Datasheet - Page 16

• Manufacturer Part Number: MT93L04
• Description: 128-channel Voice Echo Canceller
• Manufacturer: Zarlink Semiconductor

Pin Description (continued)
Tsig(9)_d3
Tsig(11)_d3
Tsig(12)_d3
Tsig(13)_d3
Tsig(15)_d3
MCLK_d3
Fsel_d3
Step_d3
PLLVSS1_d3
PLLVDD_d3
SC_Fclk_d3
Tsig(8)_d3
Tsig(10)_d3
Tsig(14)_d3
Tm1_d3
Tm2_d3
Sg1_d3
DT1_d3
Halt_d3
Signal Name
ICO
NC
NC
NC
NC
NC
NC
NC
NC
ICO
ICO
ICO
NC
Signal
Signal
ICO
ICO
Power
Power
Signal Type
T12
Y13
T11
Y12
W12
BGA Ball #
W11
T17
U17
U16
T16
T15
U15
T14
U14
T13
U13
U11
Y11
V11
Zarlink Semiconductor Inc.
MT93L04
16
Internal Connection. Connected to VSS for
normal operation
No connection. The pin must be left open for
normal operation.
No connection. The pin must be left open for
normal operation.
No connection. The pin must be left open for
normal operation.
No connection. The pin must be left open for
normal operation.
No connection. The pin must be left open for
normal operation.
No connection. The pin must be left open for
normal operation.
No connection. The pin must be left open for
normal operation.
No connection. The pin must be left open for
normal operation.
Internal Connection. Connected to VSS for
normal operation
Internal Connection. Connected to VSS for
normal operation
Internal Connection. Connected to VSS for
normal operation
No connection. The pin must be left open for
normal operation.
Master Clock (Input). Nominal 10 MHz or
20 MHz Master Clock input. May be connected to
an asynchronous (relative to frame signal) clock
source.
Frequency select (Input). This input selects the
Master Clock frequency operation. When Fsel pin
is low, nominal 19.2 MHz Master Clock input must
be applied. When Fsel pin is high, nominal
9.6 MHz Master Clock input must be applied.
Internal Connection. Connected to VSS for
normal operation
Internal Connection. Connected to VSS for
normal operation
PLL Ground. Must be connected to VSS
PLL Power Supply. Must be connected to VDD2
Signal Description
Data Sheet