MT93L04 Zarlink Semiconductor, MT93L04 Datasheet - Page 34

• Manufacturer Part Number: MT93L04
• Description: 128-channel Voice Echo Canceller
• Manufacturer: Zarlink Semiconductor

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Instruction Register
In accordance with the IEEE 1149.1 standard, the MT93L00 uses public instructions. The JTAG Interface contains
a 3-bit instruction register. Instructions are serially loaded into the instruction register from the TDI when the TAP
Controller is in its shifted-IR state. Subsequently, the instructions are decoded to achieve two basic functions: to
select the test data register that will operate while the instruction is current, and to define the serial test data register
path, which is used to shift data between TDI and TDO during data register scanning.
Test Data Registers
As specified in IEEE 1149.1, the MT93L00 JTAG Interface contains three test data registers:
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Test Mode Select Input (TMS)
Test Data Input (TDI)
Test Data Output (TDO)
Test Reset (TRST)
Boundary-Scan register
Bypass Register
Device Identification register
The logic signals received at the TMS input are interpreted by the TAP Controller to control the test operations.
The TMS signals are sampled at the rising edge of the TCK pulse. This pin is internally pulled to V
not driven from an external source.
Serial input data applied to this port is fed either into the instruction register or into a test data register, depending
on the sequence previously applied to the TMS input. Both registers are described in a subsequent section. The
received input data is sampled at the rising edge of TCK pulses. This pin is internally pulled to V
driven from an external source
Depending on the sequence previously applied to the TMS input, the contents of either the instruction register
or data register are serially shifted out towards the TDO. The data from the TDO is clocked on the falling edge
of the TCK pulses. When no data is shifted through the Boundary Scan cells, the TDO driver is set to a high
impedance state.
This pin is used to reset the JTAG scan structure. This pin is internally pulled to V
The Boundary-Scan register consists of a series of Boundary-Scan cells arranged to form a scan path around
the boundary of the MT93L00 core logic.
The Bypass register is a single stage shift register that provides a one-bit path from TDI TDO.
The Device Identification register provides access to the following encoded information:
device version number, part number and manufacturer's name.
Zarlink Semiconductor Inc.
MT93L04
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Data Sheet
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